Byron Lathi a94b26dc3c Change code and data base to be pointers ...

These are technically pointers, so lets type them as such.

2022-04-16 19:24:21 -05:00

hw

Reset bit count upon entering RXDATA

2022-04-14 11:20:48 -05:00

sw

Change code and data base to be pointers

2022-04-16 19:24:21 -05:00

.gitlab-ci.yml

add testbench for SD command tx

2022-04-08 12:29:15 -05:00

Description

No description provided

5.5 MiB

Languages

SystemVerilog 47.7%

Verilog 41.8%

Python 4.8%

VHDL 2%

Assembly 2%

Other 1.6%