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eth: Remove extraneous defaults

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-06-13 16:45:00 -07:00
parent 741615f203
commit 3349561810
3 changed files with 3 additions and 3 deletions
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2
src/eth/rtl/taxi_eth_mac_10g.sv
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@@ -63,7 +63,7 @@ module taxi_eth_mac_10g #
input wire logic xgmii_rx_valid = 1'b1,
output wire logic [DATA_W-1:0] xgmii_txd,
output wire logic [CTRL_W-1:0] xgmii_txc,
output wire logic xgmii_tx_valid = 1'b1,
output wire logic xgmii_tx_valid,
input wire logic [GBX_CNT-1:0] tx_gbx_req_sync = '0,
input wire logic tx_gbx_req_stall = 1'b0,
output wire logic [GBX_CNT-1:0] tx_gbx_sync,

2
src/eth/rtl/taxi_eth_mac_10g_fifo.sv
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@@ -77,7 +77,7 @@ module taxi_eth_mac_10g_fifo #
input wire logic xgmii_rx_valid = 1'b1,
output wire logic [DATA_W-1:0] xgmii_txd,
output wire logic [CTRL_W-1:0] xgmii_txc,
output wire logic xgmii_tx_valid = 1'b1,
output wire logic xgmii_tx_valid,
input wire logic [GBX_CNT-1:0] tx_gbx_req_sync = '0,
input wire logic tx_gbx_req_stall = 1'b0,
output wire logic [GBX_CNT-1:0] tx_gbx_sync,

2
src/eth/rtl/taxi_eth_phy_10g.sv
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@@ -45,7 +45,7 @@ module taxi_eth_phy_10g #
input wire logic xgmii_tx_valid = 1'b1,
output wire logic [DATA_W-1:0] xgmii_rxd,
output wire logic [CTRL_W-1:0] xgmii_rxc,
output wire logic xgmii_rx_valid = 1'b1,
output wire logic xgmii_rx_valid,
output wire logic tx_gbx_req_sync,
output wire logic tx_gbx_req_stall,
input wire logic tx_gbx_sync = 1'b0,