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eth: Fix timestamping point for SGMII

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2026-07-19 14:02:50 -07:00
parent 20c77dd04e
commit 5d6d9d9dfd
2 changed files with 16 additions and 13 deletions
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27
src/eth/rtl/taxi_axis_basex_rx_8.sv
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@@ -493,21 +493,9 @@ always_ff @(posedge clk) begin
rx_an_cfg_valid_reg <= 1'b0;
start_packet_int_reg <= 1'b0;
start_packet_reg <= 1'b0;
if (start_packet_int_reg) begin
ptp_ts_out_reg <= ptp_ts;
start_packet_reg <= 1'b1;
end
if (!GBX_IF_EN || encoded_rx_data_valid) begin
if (in_frame_reg) begin
in_frame_reg <= encoded_rx_data_k == 0;
end else if (encoded_rx_data_k == 0 && encoded_rx_data == ETH_SFD) begin
in_frame_reg <= 1'b1;
start_packet_int_reg <= 1'b1;
end
if (!SGMII_EN || !rep_stall_reg) begin
encoded_rx_data_d0_reg <= encoded_rx_data;
@@ -519,6 +507,21 @@ always_ff @(posedge clk) begin
encoded_rx_data_k_d0_reg <= encoded_rx_data_k;
end
if (start_packet_int_reg) begin
ptp_ts_out_reg <= ptp_ts;
if (!SGMII_EN || ((rep_cnt_reg == 0 || rep_cnt_reg[0]) && !rep_stall_reg)) begin
start_packet_int_reg <= 1'b0;
start_packet_reg <= 1'b1;
end
end
if (in_frame_reg) begin
in_frame_reg <= encoded_rx_data_k == 0;
end else if (encoded_rx_data_k == 0 && encoded_rx_data == ETH_SFD) begin
in_frame_reg <= 1'b1;
start_packet_int_reg <= 1'b1;
end
input_k28p5_d0_reg <= 1'b0;
input_i_d0_reg <= 1'b0;
input_c_d0_reg <= 1'b0;

2
src/eth/tb/basex.py
View File

@@ -455,7 +455,7 @@ class BaseXSerdesSource():
d = frame.data[frame_offset]
if frame.sim_time_sfd is None and not in_pre:
frame.sim_time_sfd = sim_time + (clk_period // self.byte_lanes * k) - gbx_delay
if d == EthPre.SFD:
if d == EthPre.SFD and (not self.gmii_rep_count or rep_cnt == 1):
in_pre = False
if frame.error[frame_offset]:
# /V/