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eth: Add reset logic, QPLL control signals, and additional configuration parameters for US/US+ GTH/GTY transceivers

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-05-21 21:06:45 -07:00
parent 66b53d98a2
commit 8a77ee9fc7
42 changed files with 1686 additions and 176 deletions
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10
src/eth/example/KCU105/fpga/rtl/fpga_core.sv
View File

@@ -567,9 +567,19 @@ end else begin : sfp_mac
*/
.xcvr_gtpowergood_out(sfp_gtpowergood),
.xcvr_gtrefclk00_in(sfp_mgt_refclk_0),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0reset_in(1'b0),
.xcvr_qpll0pcierate_in(3'd0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(sfp_mgt_refclk_0),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1reset_in(1'b0),
.xcvr_qpll1pcierate_in(3'd0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/KCU105/fpga/tb/fpga_core/test_fpga_core.py
View File

@@ -159,9 +159,13 @@ async def mac_test(tb, source, sink):
tb.log.info("MAC test done")
async def mac_test_25g(tb, source, sink):
async def mac_test_10g(tb, source, sink):
tb.log.info("Test MAC")
tb.log.info("Wait for block lock")
for k in range(1200):
await RisingEdge(tb.dut.clk)
tb.log.info("Multiple small packets")
count = 64
@@ -218,7 +222,7 @@ async def run_test(dut):
tests.append(cocotb.start_soon(mac_test(tb, tb.sfp_sources[k], tb.sfp_sinks[k])))
else:
tb.log.info("Start SFP %d 10G MAC loopback test", k)
tests.append(cocotb.start_soon(mac_test_25g(tb, tb.sfp_sources[k], tb.sfp_sinks[k])))
tests.append(cocotb.start_soon(mac_test_10g(tb, tb.sfp_sources[k], tb.sfp_sinks[k])))
await Combine(*tests)