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example/Alveo: Add XFCP to Alveo example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -72,8 +72,110 @@ module fpga_core #
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output wire logic [PORT_CNT-1:0] eth_port_lpmode
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);
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// UART
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for (genvar n = 0; n < UART_CNT; n = n + 1) begin : uart_ch
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// XFCP
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taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_ds(), xfcp_us();
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taxi_xfcp_if_uart #(
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.TX_FIFO_DEPTH(512),
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.RX_FIFO_DEPTH(512)
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)
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xfcp_if_uart_inst (
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.clk(clk_125mhz),
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.rst(rst_125mhz),
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/*
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* UART interface
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*/
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.uart_rxd(uart_rxd),
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.uart_txd(uart_txd),
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/*
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* XFCP downstream interface
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*/
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.xfcp_dsp_ds(xfcp_ds),
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.xfcp_dsp_us(xfcp_us),
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/*
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* Configuration
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*/
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.prescale(16'(125000000/3000000))
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);
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taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
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taxi_xfcp_switch #(
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.XFCP_ID_STR("Alveo"),
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.XFCP_EXT_ID(0),
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.XFCP_EXT_ID_STR("Taxi example"),
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.PORTS($size(xfcp_sw_us))
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)
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xfcp_sw_inst (
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.clk(clk_125mhz),
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.rst(rst_125mhz),
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/*
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* XFCP upstream port
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*/
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.xfcp_usp_ds(xfcp_ds),
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.xfcp_usp_us(xfcp_us),
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/*
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* XFCP downstream ports
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*/
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.xfcp_dsp_ds(xfcp_sw_ds),
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.xfcp_dsp_us(xfcp_sw_us)
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);
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taxi_axis_if #(.DATA_W(16), .KEEP_W(1), .KEEP_EN(0), .LAST_EN(0), .USER_EN(1), .USER_W(1), .ID_EN(1), .ID_W(10)) axis_stat();
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taxi_xfcp_mod_stats #(
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.XFCP_ID_STR("Statistics"),
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.XFCP_EXT_ID(0),
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.XFCP_EXT_ID_STR(""),
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.STAT_COUNT_W(64),
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.STAT_PIPELINE(2)
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)
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xfcp_stats_inst (
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.clk(clk_125mhz),
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.rst(rst_125mhz),
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/*
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* XFCP upstream port
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*/
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.xfcp_usp_ds(xfcp_sw_ds[0]),
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.xfcp_usp_us(xfcp_sw_us[0]),
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/*
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* Statistics increment input
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*/
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.s_axis_stat(axis_stat)
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);
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taxi_axis_if #(.DATA_W(16), .KEEP_W(1), .KEEP_EN(0), .LAST_EN(0), .USER_EN(1), .USER_W(1), .ID_EN(1), .ID_W(10)) axis_eth_stat[GTY_QUAD_CNT]();
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taxi_axis_arb_mux #(
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.S_COUNT($size(axis_eth_stat)),
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.UPDATE_TID(1'b0),
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.ARB_ROUND_ROBIN(1'b1),
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.ARB_LSB_HIGH_PRIO(1'b0)
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)
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stat_mux_inst (
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.clk(clk_125mhz),
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.rst(rst_125mhz),
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/*
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* AXI4-Stream inputs (sink)
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*/
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.s_axis(axis_eth_stat),
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/*
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* AXI4-Stream output (source)
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*/
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.m_axis(axis_stat)
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);
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// Additional UARTs
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for (genvar n = 1; n < UART_CNT; n = n + 1) begin : uart_ch
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taxi_axis_if #(.DATA_W(8)) axis_uart();
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@@ -128,8 +230,6 @@ wire [GTY_CNT-1:0] eth_gty_rx_clk;
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wire [GTY_CNT-1:0] eth_gty_rx_rst;
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taxi_axis_if #(.DATA_W(64), .ID_W(8)) eth_gty_axis_rx[GTY_CNT]();
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taxi_axis_if #(.DATA_W(16), .KEEP_W(1), .KEEP_EN(0), .LAST_EN(0), .USER_EN(1), .USER_W(1), .ID_EN(1), .ID_W(8)) eth_gty_axis_stat[GTY_QUAD_CNT]();
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wire [GTY_CNT-1:0] eth_gty_rx_status;
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wire [GTY_QUAD_CNT-1:0] eth_gty_gtpowergood;
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@@ -210,7 +310,11 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
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.TX_SERDES_PIPELINE(1),
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.RX_SERDES_PIPELINE(1),
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.COUNT_125US(125000/6.4),
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.STAT_EN(1'b0)
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.STAT_EN(1),
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.STAT_TX_LEVEL(1),
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.STAT_RX_LEVEL(1),
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.STAT_ID_BASE(n*CNT*(16+16)),
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.STAT_UPDATE_PERIOD(1024)
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)
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mac_inst (
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.xcvr_ctrl_clk(clk_125mhz),
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@@ -293,7 +397,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
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*/
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.stat_clk(clk_125mhz),
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.stat_rst(rst_125mhz),
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.m_axis_stat(eth_gty_axis_stat[n]),
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.m_axis_stat(axis_eth_stat[n]),
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/*
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* Status
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