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54 Commits 1 Branch 0 Tags
0ddb89b18f8f7abb3c847bd2f9f0783e1a20e02e
Commit Graph

15 Commits

Author SHA1 Message Date
Alex Forencich
0ddb89b18f eth: Add 10G Ethernet MAC module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-08 21:26:03 -08:00
Alex Forencich
fa73f9c1d5 eth: Add 1G Ethernet MAC module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-08 21:25:48 -08:00
Alex Forencich
8d3d703656 eth: Add MAC control modules 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-08 19:59:11 -08:00
Alex Forencich
96e348ac84 eth: Invert TX completion output control 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 23:24:28 -08:00
Alex Forencich
72dabc5a9a eth: Add AXI stream 64-bit BASE-R Ethernet frame receiver module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 18:03:23 -08:00
Alex Forencich
2af4e7af3e eth: Add AXI stream 64-bit XGMII Ethernet frame transmitter module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 18:03:15 -08:00
Alex Forencich
a375eb342d eth: Add AXI stream 32-bit XGMII Ethernet frame transmitter module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 18:03:06 -08:00
Alex Forencich
c914adf9f1 eth: Add AXI stream GMII Ethernet frame receiver module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 18:02:48 -08:00
Alex Forencich
e3f047d735 eth: Add AXI stream 64-bit BASE-R Ethernet frame receiver module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 16:27:27 -08:00
Alex Forencich
f0f2a25943 eth: Add AXI stream 64-bit XGMII Ethernet frame receiver module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 16:25:54 -08:00
Alex Forencich
8046a46680 eth: Add AXI stream 32-bit XGMII Ethernet frame receiver module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 16:25:06 -08:00
Alex Forencich
3f501aaac9 eth: Add AXI stream GMII Ethernet frame receiver module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-07 16:12:58 -08:00
Alex Forencich
584f2a6542 eth: Add MAC pause control modules 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-05 21:11:14 -08:00
Alex Forencich
e35d2b2c03 eth: Add 10G PHY module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-04 17:10:21 -08:00
Alex Forencich
c6ea4071eb eth: Add XGMII/BASE-R encode/decode modules and testbenches 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-04 16:14:32 -08:00