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7128b90c1dd33950e4e624468a59c0d48c111b8e
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3 Commits

Author SHA1 Message Date
Alex Forencich
ebeadee172 lss: Implement fractional baud rate generation for UART 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-03-11 23:49:39 -07:00
Alex Forencich
c6cbb57fe7 lss: Extract UART data width setting from interface 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-26 14:15:42 -08:00
Alex Forencich
c4558a02f0 lss: Add UART module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-03 15:02:48 -08:00