Alex Forencich
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84fb93b5c3
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example: Add signal sync timing constraints to example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-25 16:04:32 -08:00 |
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Alex Forencich
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7047cb5c4f
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eth: Tie off transceiver control signals during simulation
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-24 16:28:59 -08:00 |
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Alex Forencich
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34266fe25d
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example/ZCU111: Add example design for ZCU111
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-23 17:32:21 -08:00 |
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