Alex Forencich
|
245e71551b
|
pcie: Add MSI shim for UltraScale
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-12-23 18:03:56 -08:00 |
|
Alex Forencich
|
004246608e
|
Use logic instead of reg
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-11-07 02:14:19 -08:00 |
|
Alex Forencich
|
9307e0df6c
|
pcie: Clean up casts
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-09-07 15:17:46 -07:00 |
|
Alex Forencich
|
40908b1b92
|
Testbench cleanup for cocotb 2.0
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-09-07 10:59:38 -07:00 |
|
Alex Forencich
|
2ae5b5fae3
|
pcie: Remove TLP_HDR_W parameter from testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-09-01 22:08:18 -07:00 |
|
Alex Forencich
|
bf584147a1
|
pcie: Clean up AXI lite interface width handling in PCIe US AXI lite master
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-08-29 17:59:56 -07:00 |
|
Alex Forencich
|
b3441f6408
|
pcie: Rename enable to en in PCIe US AXI lite master
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-08-29 17:59:33 -07:00 |
|
Alex Forencich
|
63c961cab4
|
pcie: Fix some corner cases in PCIe US AXI lite master
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-08-29 16:50:31 -07:00 |
|
Alex Forencich
|
b5c9c02b03
|
pcie: Add UltraScale PCIe AXI Lite Master module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-08-25 22:39:28 -07:00 |
|
Alex Forencich
|
66b53d98a2
|
Reorganize repository
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-18 12:25:59 -07:00 |
|