Alex Forencich
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be80d4e964
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pcie: Tie off AXIL user signals in PCIe AXI lite master module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-21 02:48:18 -08:00 |
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Alex Forencich
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1e6f5531d1
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eth: Fix typo
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 22:15:01 -08:00 |
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Alex Forencich
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c37b4cbbfa
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pyrite: Cast widths
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 22:14:20 -08:00 |
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Alex Forencich
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9b55a08465
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pcie: Cast widths in VPD implementation
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 22:14:01 -08:00 |
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Alex Forencich
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63c9544c3f
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cndm: Clean up parameters, add flashing support via pyrite
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 22:05:50 -08:00 |
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Alex Forencich
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b68be72e70
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cndm: Fix readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 21:34:06 -08:00 |
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Alex Forencich
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5a439c7e8e
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pyrite: Add flash access modules for UltraScale PCIe VPD
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 21:33:09 -08:00 |
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Alex Forencich
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2387aa793e
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eth: Add Ethernet example design for RK-XCKU5P-F board
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 21:31:46 -08:00 |
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Alex Forencich
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add1c7aec2
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eth: Fix path
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 21:10:04 -08:00 |
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Alex Forencich
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8fe55a6aae
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eth: Minor example design cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 13:54:48 -08:00 |
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Alex Forencich
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2b2450da54
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cndm: Fix path
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-20 12:41:10 -08:00 |
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Alex Forencich
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589a80f582
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pyrite: Initial commit of pyrite flashing utility
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-19 21:46:09 -08:00 |
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Alex Forencich
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8f40d3a426
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cndm_proto: Fix PCIe class code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-18 13:21:35 -08:00 |
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Alex Forencich
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43de83de89
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cndm: Fix PCIe class code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-18 13:21:24 -08:00 |
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Alex Forencich
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8b13e7a1ea
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ptp: Ensure reads are consistent
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-16 20:37:37 -08:00 |
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Alex Forencich
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45d7b1d77c
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ptp: Fix signal name
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-16 17:47:29 -08:00 |
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Alex Forencich
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dc70c7247a
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ptp: Fix parameter name
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-16 16:54:56 -08:00 |
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Alex Forencich
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9630afce1d
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pcie: Add VPD capability implementation for UltraScale+
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-16 13:37:35 -08:00 |
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Alex Forencich
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d6744bc99b
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cndm_proto: Clean up ports
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-16 12:34:37 -08:00 |
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Alex Forencich
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ab01a1ba42
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cndm: Clean up ports
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-16 12:34:28 -08:00 |
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Alex Forencich
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5951547d11
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apb: Add APB to AXI lite adapter module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-15 12:49:30 -08:00 |
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Alex Forencich
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51e0909327
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-14 15:36:37 -08:00 |
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Alex Forencich
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88310fd348
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cndm: Add PTP support
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-14 00:44:42 -08:00 |
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Alex Forencich
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eb289eb045
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cndm_proto: Update MAC instances
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-13 22:21:00 -08:00 |
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Alex Forencich
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2ef9481d00
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eth: Update example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-13 22:18:52 -08:00 |
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Alex Forencich
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31553f5734
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eth: Integrate PTP TD leaf clock into MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-13 21:54:11 -08:00 |
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Alex Forencich
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380e2d521a
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ptp: Adjust loop gains in PTP TD leaf clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-13 21:26:48 -08:00 |
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Alex Forencich
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ce8147f174
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ptp: Adjust for delay when setting time in PTP TD model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-13 21:25:37 -08:00 |
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Alex Forencich
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8b6fb5fdb2
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ptp: Tame the control loop a bit, avoid higher gain when locked
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-13 17:30:52 -08:00 |
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Alex Forencich
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0461953bcc
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ptp: Fix wraparound issue in PTP TD leaf clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-13 16:51:14 -08:00 |
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Alex Forencich
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9c51c6e275
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ptp: Fix typo in PTP TD model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-12 23:11:13 -08:00 |
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Alex Forencich
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c247b3fc7a
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ptp: Add PTP TD PHC control register wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-12 18:05:46 -08:00 |
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Alex Forencich
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86202e5263
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cndm_proto: Connect PCIe cfg_mgmt in testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-06 15:47:14 -08:00 |
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Alex Forencich
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1ad0b99952
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cndm: Connect PCIe cfg_mgmt in testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-06 15:47:04 -08:00 |
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Alex Forencich
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43e46044f6
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dma: Fix typo
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-06 13:47:21 -08:00 |
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Alex Forencich
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7606ca328b
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cndm_proto: Add PCIe configuration shim instance to read extended tag enable bit
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-05 14:37:42 -08:00 |
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Alex Forencich
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20a5166f96
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cndm: Add PCIe configuration shim instance to read extended tag enable bit
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-05 14:37:27 -08:00 |
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Alex Forencich
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ddac834e99
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pcie: Add configuration shim for UltraScale
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-05 14:35:01 -08:00 |
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Alex Forencich
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62da198a76
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dma: Remove extraneous comma
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-01-18 00:13:18 -08:00 |
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Alex Forencich
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8328f50673
|
lss: Add I2C slave APB master module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-01-13 18:25:06 -08:00 |
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Alex Forencich
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9e8925de39
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lss: Tie off unused interface signals
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-13 15:59:06 -08:00 |
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Alex Forencich
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9e336fbdd5
|
Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-12 00:19:18 -08:00 |
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Alex Forencich
|
bedd85d7f6
|
Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-10 00:35:42 -08:00 |
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Alex Forencich
|
be40d3ac2d
|
eth: Update example design readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-09 16:43:01 -08:00 |
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Alex Forencich
|
329fcf1f45
|
cndm_proto: Add some comments to core HDL
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-09 00:05:10 -08:00 |
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Alex Forencich
|
4b3a4b4059
|
eth: Capture TX tag on the first cylce of the packet
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-03 23:44:53 -08:00 |
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Alex Forencich
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108fb10735
|
cndm_proto: Remove padding bug workaround
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-02 01:24:51 -08:00 |
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Alex Forencich
|
3c4aecc859
|
cndm: Remove padding bug workaround
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-02 01:24:42 -08:00 |
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Alex Forencich
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711b268cb7
|
cndm_proto: Clean up tests
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-02 01:24:21 -08:00 |
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Alex Forencich
|
2987c8db71
|
cndm: Clean up tests
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-02 01:24:08 -08:00 |
|