bslathi19/taxi
1
0
Fork 0
mirror of https://github.com/fpganinja/taxi.git synced 2025-12-09 17:08:38 -08:00
Code Issues Packages Projects Releases Wiki Activity
151 Commits 1 Branch 0 Tags
f419b3167a3e08c4068f3275fe5142a85789e050
Commit Graph

2 Commits

Author SHA1 Message Date
Alex Forencich
c6cbb57fe7 lss: Extract UART data width setting from interface 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-26 14:15:42 -08:00
Alex Forencich
c4558a02f0 lss: Add UART module and testbench 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2025-02-03 15:02:48 -08:00