Files
taxi/example/ADM_PCIE_9V3/fpga/README.md
2025-02-23 00:49:41 -08:00

33 lines
953 B
Markdown

# Taxi Example Design for ADM-PCIE-9V3
## Introduction
This example design targets the Alpha Data ADM-PCIE-9V3 FPGA board.
The design places looped-back MACs on the QSFP28 ports.
* QSFP28
* Looped-back 10GBASE-R or 25GBASE-R MACs via GTY transceivers
## Board details
* FPGA: xcvu3p-ffvc1517-2-i
* 25GBASE-R PHY: Soft PCS with GTY transceivers
## Licensing
* Toolchain
* Vivado Enterprise (requires license)
* IP
* No licensed vendor IP or 3rd party IP
## How to build
Run `make` in the appropriate `fpga*` subdirectory to build the bitstream. Ensure that the Xilinx Vivado toolchain components are in PATH.
## How to test
Run `make program` to program the board with Vivado.
To test the looped-back MAC, it is recommended to use a network tester like the Viavi T-BERD 5800 that supports basic layer 2 tests with a loopback. Do not connect the looped-back MAC to a network as the reflected packets may cause problems.