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blathi/soc_core

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#2

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• cdbb6a9720 Get it to ACTUALLY compile :) blathi/soc_core Byron Lathi 2026-05-24 20:30:34 -07:00
• 6c6c3d295b Add design doc Byron Lathi 2026-05-24 20:09:02 -07:00
• a21cc4241a Get it to compile at least Byron Lathi 2026-05-24 20:06:08 -07:00
• 151643b2ad Get it working more Byron Lathi 2026-05-24 17:13:20 -07:00
• 61ee654b18 Get it roughly working Byron Lathi 2026-05-24 15:53:50 -07:00
• aa8c4a64df First shot at happy path Byron Lathi 2026-05-22 23:54:33 -07:00
• df25550c8a Add cache arrays and test Byron Lathi 2026-05-22 22:27:53 -07:00
• 3ea31e40aa Last commit before I nuke it Byron Lathi 2026-05-22 09:10:19 -07:00
• 8fd83c2563 Get it to kinda work Byron Lathi 2026-05-19 19:57:15 -07:00
• 62a3408eb7 Add some stuff related to cache Byron Lathi 2026-05-16 16:55:21 -07:00
• 042d7724ff Move everything around Byron Lathi 2026-05-09 16:00:25 -07:00
• 089df744aa 32bit (#2) master Byron Lathi 2026-05-09 15:33:54 -07:00
• 06f933fa56 Factor out verilog-6502 submodule Byron Lathi 2026-04-18 18:55:05 -07:00
• db61ca2d74 Create project Byron Lathi 2026-04-18 18:50:18 -07:00