Skip to content
Snippets Groups Projects

Repository graph

You can move around the graph by using the arrow keys.
Select Git revision
  • 4-support-hard-memories-in-fifos
  • master default protected
2 results
Created with Raphaël 2.2.025Feb23916Jan124Dec222014Oct1319Aug16Jun15842129May12Feb119529Jan282726171615142Dec130Nov291087112Oct26Sep242322211826Aug252422161427Jul262423222120191715138629Jun22Feb171329Jan25241513130Dec292781Nov20Oct18Sep725Jul242216May1513530Mar271631Dec271029Nov2825241573220Oct19181716151328Sep13127Aug262517831Jul828Jun2332131May3025191816543Apr30Mar2717168656Feb16Jan30Dec29282520316Oct32130Sep2928272322201876317Aug617Jul16151310117May517Apr627Mar23Feb2120191815Jan17Dec30Oct242212Aug9529Jul25241918171615127Jun262520191615141312109876327May1610226Apr17328Mar272625147Add verilator.vltmastermasterRemove lib/axisAdd axis_register_wrapperAdd axis arb mux wrapper with interfacesFix conflicting namesFix iddr and ssio_ddr_in for EFINIXFix sources.list, fix iddr/oddrAdd Efinix DDIO Primitivesfix typoAdd axis pipeline register but for interfacesRemove space from sourcesMerge branch '3-reset-hdr_ready_seen' into 'master'4-support-hard-…4-support-hard-memories-in-fifosIn all states except duplicate, reset hdr_ready_seenMerge branch '2-ethernet-frame-duplicator' into 'master'Don't infer latchesAdd ethernet frame duplicatorAdd sources.listMerge branch '1-add-8-bit-icmp-rx-tx' into 'master'Add 8 bit icmp tx and rxFix count issue from udp copyRemove invalid parameterAdd icmp_ip_tx_64Add icmp_ip_rx_64Add hack for no tkeep to tkeepReorganize PTP timestamp capture logic; determine PTP clock step size from PTP time instead of parametersAdd ptp_td_rel2tod module for timestamp reconstructionMove alternate offset switch near the end of the current second to extend reconstruction range for timestamps in the pastClean up PTP parameters on MACsRemove extraneous scaleb(-9) in set_ts_tod_ns in ptp_td so that the seconds field can be set correctlymerged changes in axisSplit out and pipeline relative timestamp LSB increment in PTP TD leaf clockRework MAC TX error handling to streamline logic; pad errored frames to avoid generating runt framesAdd TX underrun and error testsCleanup RGMII PHY IF, fix TX error indicationFix wait end state in GMII TXClean up XGMII symbol generationForce AXIS RAM switch output FIFO into distributed RAMHandle framing errors in payload state in XGMII RX moduleUnconditionally transfer out XGMII data in XGMII RX modulesMove timestamp capture into payload state in XGMII RX module