Factor out verilog6502 into its own submodule

This commit is contained in:
2026-04-18 18:55:40 -07:00
parent 048af1c341
commit ef6b5f0669
18 changed files with 5 additions and 1700 deletions

Submodule sub/verilog-6502 deleted from 8f19e45b40

1
sub/verilog6502 Submodule

Submodule sub/verilog6502 added at db61ca2d74