Integrate uart controller into top level module

Adds new chip select for the UART, and a new entry in the data_out mux
for the UART.

hw/fpga/addr_decode.sv

@@ -2,11 +2,13 @@ module addr_decode(
     input logic [15:0] addr,
     output logic ram_cs,
     output logic rom_cs,
-    output logic hex_cs
+    output logic hex_cs,
+    output logic uart_cs
 );
 
 assign rom_cs = addr[15];
 assign ram_cs = ~addr[15] && addr < 16'h7ff0;
 assign hex_cs = addr >= 16'h7ff0 && addr < 16'h7ff4;
+assign uart_cs = addr >= 16'h7ff4 && addr < 16'h7ff6;
 
 endmodule