bslathi19/super6502
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  • ed18b381f3 Change "clkdiv" to "tx_clkdiv" Byron Lathi 2022-03-14 15:22:18 -05:00
  • 264263b0d9 Change "state" to "tx_state" etc. Byron Lathi 2022-03-14 15:10:59 -05:00
  • b2344d986e Add UART interrupts Byron Lathi 2022-03-14 14:57:45 -05:00
  • 0316d047e3 Merge branch 'irqs' into 'master' Byron Lathi 2022-03-14 19:04:30 +00:00
  • f5dbe46060 Add irq_set_status Byron Lathi 2022-03-14 13:34:33 -05:00
  • a5474b5ae5 Implement interrupt status register Byron Lathi 2022-03-14 13:30:01 -05:00
  • e012eb7d4d Exclude vectors from list of test objects Byron Lathi 2022-03-14 13:27:29 -05:00
  • e70fffb472 Add irq status register Byron Lathi 2022-03-14 13:16:09 -05:00
  • 26070313f4 Ignore greybox_tmp Byron Lathi 2022-03-14 13:15:20 -05:00
  • fe45331e7a Add interrupt handlers and redo vector locations Byron Lathi 2022-03-14 11:54:43 -05:00
  • ff78fd0179 Connect Button 1 to cpu_irqb Byron Lathi 2022-03-14 11:53:45 -05:00
  • 5560b06c9f Merge branch 'uart' into 'master' Byron Lathi 2022-03-14 16:02:04 +00:00
  • 4fb73f8e97 Update cs_testbench.sv Byron Lathi 2022-03-14 10:56:10 -05:00
  • a671fda51c Add sample puts function Byron Lathi 2022-03-14 10:46:36 -05:00
  • cfcf94a875 Integrate uart controller into top level module Byron Lathi 2022-03-14 10:45:45 -05:00
  • da4d5f0fe7 Add uart tests Byron Lathi 2022-03-14 00:47:26 -05:00
  • 0b5ccf48b8 Add basic UART driver Byron Lathi 2022-03-14 00:24:08 -05:00
  • b48438f6b2 Add write and puts tasks to the uart testbench Byron Lathi 2022-03-14 00:04:04 -05:00
  • f8da9206d9 Refactor uart.sv to better allow cpu control Byron Lathi 2022-03-14 00:00:55 -05:00
  • e063e9f6a3 Add basic UART device Byron Lathi 2022-03-13 19:39:59 -05:00
  • 5834f179d2 Ignore more modelsim files Byron Lathi 2022-03-13 19:38:12 -05:00
  • 36ff20e587 Update Makefile Byron Lathi 2022-03-12 22:40:48 -06:00
  • 45af469029 Merge branch 'hex_driver' into 'master' Byron Lathi 2022-03-13 04:23:11 +00:00
  • d229052ed6 Add hex tests Byron Lathi 2022-03-12 22:17:41 -06:00
  • a6bcadab6e Fix bugs in sevenseg.s Byron Lathi 2022-03-12 22:04:28 -06:00
  • 1a9290b97b Implement hex_set_24 Byron Lathi 2022-03-12 21:55:17 -06:00
  • 226a2972cc Implement hex_set_16 Byron Lathi 2022-03-12 21:47:59 -06:00
  • c8a7cc4153 Implement enable byte in sw Byron Lathi 2022-03-12 21:46:08 -06:00
  • c7e8cc3798 Implement enable byte in hw Byron Lathi 2022-03-12 21:45:30 -06:00
  • 9bbfce23e2 Add driver for hex digits Byron Lathi 2022-03-12 21:26:19 -06:00
  • 627b6a746a Add high pair of seven segment displays Byron Lathi 2022-03-12 21:24:37 -06:00
  • b4ff993080 Merge branch 'first_start' into 'master' Byron Lathi 2022-03-13 01:44:41 +00:00
  • 79675ec773 Clean up modelsim folder Byron Lathi 2022-03-12 19:41:08 -06:00
  • 28836259e2 Don't track vcd files either Byron Lathi 2022-03-12 19:34:43 -06:00
  • b7c92d3117 Don't track signaltap Byron Lathi 2022-03-12 19:30:37 -06:00
  • ca4288df66 Change addr_decode test to use new io locations Byron Lathi 2022-03-12 19:25:34 -06:00
  • 08af30e823 Remove C tests Byron Lathi 2022-03-12 19:25:01 -06:00
  • 5106e50395 Update bootstrap code Byron Lathi 2022-03-11 22:57:22 -06:00
  • 3d9d340520 Get the FPGA part working Byron Lathi 2022-03-11 22:55:26 -06:00
  • cdf3da9b13 Add hex drivers Byron Lathi 2022-03-11 18:25:55 -06:00
  • bf28201832 Add basic hex digit code Byron Lathi 2022-03-11 18:25:47 -06:00
  • 58362d2ac8 Remove unused code Byron Lathi 2022-03-11 18:24:04 -06:00
  • 254d7b887e Update .gitlab-ci.yml Byron Lathi 2022-03-10 22:27:43 +00:00
  • 5d8c4aab44 Add USB code Byron Lathi 2022-03-10 16:15:08 -06:00
  • aca739338a Remove spi_word and replace with spi_deselect Byron Lathi 2022-03-10 14:43:49 -06:00
  • fe3851875d Add spi_word() Byron Lathi 2022-03-10 13:38:39 -06:00
  • 35973473d3 Change spi_write_byte to spi_byte Byron Lathi 2022-03-10 12:14:07 -06:00
  • 236a75eef8 Update spi.s Byron Lathi 2022-03-10 11:29:32 -06:00
  • ee5271d955 Fix spi bug Byron Lathi 2022-03-10 11:16:35 -06:00
  • 6f3155cf35 Add sim65 tests Byron Lathi 2022-03-10 11:06:21 -06:00
  • eed7c21971 Update Makefile Byron Lathi 2022-03-10 10:29:34 -06:00
  • fff193ea0f Add basic spi code Byron Lathi 2022-03-10 10:26:36 -06:00
  • 80d49b4f87 Update makefile Byron Lathi 2022-03-10 10:25:36 -06:00
  • 3f5a653326 Rename assembly files from .S to .s Byron Lathi 2022-03-10 10:17:37 -06:00
  • bac37bab55 Remove non existing import Byron Lathi 2022-03-08 15:50:10 -06:00
  • 2c26e82a0d Remove io c code Byron Lathi 2022-03-08 15:41:03 -06:00
  • ad55f986f5 Add bb_spi_controller Byron Lathi 2022-03-08 15:26:01 -06:00
  • e1f50e825d Ignore gerber output files and folders Byron Lathi 2022-03-08 15:25:05 -06:00
  • de320babfc Fix ground plane not connected Byron Lathi 2022-03-08 15:23:20 -06:00
  • f1f1a90eeb Change IO_REMAP location Byron Lathi 2022-03-05 23:23:05 -06:00
  • 16b50dcca7 Add io chip select Byron Lathi 2022-03-05 23:15:50 -06:00
  • 0ad18720bb update cc65 docker image Byron Lathi 2022-03-05 22:58:53 -06:00
  • db3a150f93 Use different cc65 docker image Byron Lathi 2022-03-05 22:39:36 -06:00
  • e9104e4233 Add explicit assembly targets Byron Lathi 2022-03-05 22:34:54 -06:00
  • 6b24abdbd5 Add io helper functions Byron Lathi 2022-03-05 22:34:34 -06:00
  • 859a954996 Add STARTUP info Byron Lathi 2022-03-05 21:26:09 -06:00
  • 048db615b9 Add basic io header Byron Lathi 2022-03-05 21:17:33 -06:00
  • 9c29aa4fdf Update linker script to allow c source files Byron Lathi 2022-03-05 21:09:46 -06:00
  • 378b3c0cb1 run addr_decode test Byron Lathi 2022-03-05 20:13:33 -06:00
  • c70272f9de Add addr_decode and testbench Byron Lathi 2022-03-05 20:11:47 -06:00
  • 37e122197f Refactor CI into one file Byron Lathi 2022-03-05 19:22:00 -06:00
  • 8855bedaf2 Change to directory before running quartus Byron Lathi 2022-03-05 19:11:34 -06:00
  • 397372d9dc Revert "Change to using includes rather than children" Byron Lathi 2022-03-06 01:09:37 +00:00
  • fd87d5b0ba Change to using includes rather than children Byron Lathi 2022-03-05 19:08:42 -06:00
  • a854ac4067 Fix fpga ci Byron Lathi 2022-03-05 19:00:49 -06:00
  • e29bf45ecb Add fpga ci Byron Lathi 2022-03-05 19:00:06 -06:00
  • dbf990df3b Add ci Byron Lathi 2022-03-05 18:57:19 -06:00
  • a2fdcc5553 Add software files Byron Lathi 2022-03-05 18:48:19 -06:00
  • bc98b67ddf Add boot rom Byron Lathi 2022-03-05 18:12:27 -06:00
  • a096f09fc9 Remove board backups folder Byron Lathi 2022-03-05 17:52:51 -06:00
  • aca17a9cf8 Create quartus project Byron Lathi 2022-03-05 17:52:42 -06:00
  • b996d93c99 Create quartus project Byron Lathi 2022-03-05 16:38:12 -06:00
  • d364c216b8 Create board Byron Lathi 2022-03-05 16:25:20 -06:00
  • f0b1ec65c3 Create project Byron Lathi 2022-03-05 12:50:54 -06:00