Byron Lathi a836643807 Disable in system memory editor for ROM ...

Now that the ROM is just a bootloader and the kernel is stored on the SD
card, we do not need to be constantly changing the ROM.

Disabling the memory editor dramatically reduces compilation time which
will be useful when implementing FPGA features in the future.

2022-04-19 14:47:19 -05:00

..

hvl

Increase sd card addr width by 1

2022-04-11 13:57:07 -05:00

simulation/modelsim

add testbench for SD command tx

2022-04-08 12:29:15 -05:00

.gitignore

ignore .sopcinfo

2022-03-17 13:53:07 -05:00

addr_decode.sv

Increase sd card addr width by 1

2022-04-11 13:57:07 -05:00

bb_spi_controller.sv

Add bb_spi_controller

2022-03-08 15:26:01 -06:00

board_io.sv

Add board-io, replace sevenseg in sw

2022-03-18 01:27:55 +00:00

cpu_clk.ppf

Add hex drivers

2022-03-11 18:25:55 -06:00

cpu_clk.qip

Add hex drivers

2022-03-11 18:25:55 -06:00

cpu_clk.v

Add hex drivers

2022-03-11 18:25:55 -06:00

crc7.sv

Have valid crc when valid signal is present

2022-04-08 12:25:17 -05:00

HexDriver.sv

Add hex drivers

2022-03-11 18:25:55 -06:00

memory_mapper.sv

Add reset input to memory mapper

2022-04-07 10:35:16 -05:00

rom.qip

Add boot rom

2022-03-05 18:12:27 -06:00

rom.v

Disable in system memory editor for ROM

2022-04-19 14:47:19 -05:00

sd_controller.sv

Reset bit count upon entering RXDATA

2022-04-14 11:20:48 -05:00

sdram_platform.qsys

Add SDRAM controller (controller)

2022-03-17 13:31:56 -05:00

sdram.sv

Add memory mapper.

2022-04-05 17:10:42 -05:00

SevenSeg.sv

Implement enable byte in hw

2022-03-12 21:45:30 -06:00

super6502.qpf

Create quartus project

2022-03-05 16:38:12 -06:00

super6502.qsf

Disable signal tap

2022-04-11 16:03:50 -05:00

super6502.sdc

Move SDRAM and state machine into its own file

2022-03-17 17:49:20 -05:00

super6502.sv

Fix some warnings

2022-04-11 16:13:38 -05:00

uart.sv

Add receive logic to UART

2022-03-14 16:41:59 -05:00