Alex Forencich
|
0ccd136c15
|
cndm: Add support for Alveo U45N/SN1000
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-23 00:45:49 -08:00 |
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Alex Forencich
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5b7b0bc35e
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cndm: Add support for Alveo AU55N/AU55C
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-23 00:45:03 -08:00 |
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Alex Forencich
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7f55a956f4
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cndm: Add support for Alveo AU250
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-22 18:32:10 -08:00 |
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Alex Forencich
|
d1aa3013c6
|
cndm: Add support for Alveo AU200/VCU1525
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-22 16:49:55 -08:00 |
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Alex Forencich
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09665325bc
|
eth: Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-22 15:13:04 -08:00 |
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Alex Forencich
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4b3319ff0c
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eth: Add Ethernet example design for XEM8320 board
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-02-22 13:58:24 -08:00 |
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Alex Forencich
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9ace50f723
|
eth: Support artixuplus in MAC wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-22 13:14:59 -08:00 |
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Alex Forencich
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d8719efbee
|
cndm: Fix device IDs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-21 15:57:34 -08:00 |
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Alex Forencich
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ca5f9b045d
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dma: Add workaround for verilator linter bug
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-21 14:03:37 -08:00 |
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Alex Forencich
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69c2a1e896
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pyrite: Cast widths
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-21 13:56:13 -08:00 |
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Alex Forencich
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427aabe5d7
|
eth: RK-XCKU5P-F XDC cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-21 02:49:01 -08:00 |
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Alex Forencich
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be80d4e964
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pcie: Tie off AXIL user signals in PCIe AXI lite master module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-21 02:48:18 -08:00 |
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Alex Forencich
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1e6f5531d1
|
eth: Fix typo
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 22:15:01 -08:00 |
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Alex Forencich
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c37b4cbbfa
|
pyrite: Cast widths
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 22:14:20 -08:00 |
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Alex Forencich
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9b55a08465
|
pcie: Cast widths in VPD implementation
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 22:14:01 -08:00 |
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Alex Forencich
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63c9544c3f
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cndm: Clean up parameters, add flashing support via pyrite
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 22:05:50 -08:00 |
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Alex Forencich
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b68be72e70
|
cndm: Fix readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 21:34:06 -08:00 |
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Alex Forencich
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5a439c7e8e
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pyrite: Add flash access modules for UltraScale PCIe VPD
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 21:33:09 -08:00 |
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Alex Forencich
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2387aa793e
|
eth: Add Ethernet example design for RK-XCKU5P-F board
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 21:31:46 -08:00 |
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Alex Forencich
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add1c7aec2
|
eth: Fix path
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 21:10:04 -08:00 |
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Alex Forencich
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8fe55a6aae
|
eth: Minor example design cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 13:54:48 -08:00 |
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Alex Forencich
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2b2450da54
|
cndm: Fix path
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-20 12:41:10 -08:00 |
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Alex Forencich
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589a80f582
|
pyrite: Initial commit of pyrite flashing utility
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-19 21:46:09 -08:00 |
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Alex Forencich
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8f40d3a426
|
cndm_proto: Fix PCIe class code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-18 13:21:35 -08:00 |
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Alex Forencich
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43de83de89
|
cndm: Fix PCIe class code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-18 13:21:24 -08:00 |
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Alex Forencich
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8b13e7a1ea
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ptp: Ensure reads are consistent
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-16 20:37:37 -08:00 |
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Alex Forencich
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45d7b1d77c
|
ptp: Fix signal name
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-16 17:47:29 -08:00 |
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Alex Forencich
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dc70c7247a
|
ptp: Fix parameter name
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-16 16:54:56 -08:00 |
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Alex Forencich
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9630afce1d
|
pcie: Add VPD capability implementation for UltraScale+
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-16 13:37:35 -08:00 |
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Alex Forencich
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d6744bc99b
|
cndm_proto: Clean up ports
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-16 12:34:37 -08:00 |
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Alex Forencich
|
ab01a1ba42
|
cndm: Clean up ports
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-16 12:34:28 -08:00 |
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Alex Forencich
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5951547d11
|
apb: Add APB to AXI lite adapter module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-15 12:49:30 -08:00 |
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Alex Forencich
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51e0909327
|
Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-14 15:36:37 -08:00 |
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Alex Forencich
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88310fd348
|
cndm: Add PTP support
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-14 00:44:42 -08:00 |
|
Alex Forencich
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eb289eb045
|
cndm_proto: Update MAC instances
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-13 22:21:00 -08:00 |
|
Alex Forencich
|
2ef9481d00
|
eth: Update example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-13 22:18:52 -08:00 |
|
Alex Forencich
|
31553f5734
|
eth: Integrate PTP TD leaf clock into MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-13 21:54:11 -08:00 |
|
Alex Forencich
|
380e2d521a
|
ptp: Adjust loop gains in PTP TD leaf clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-13 21:26:48 -08:00 |
|
Alex Forencich
|
ce8147f174
|
ptp: Adjust for delay when setting time in PTP TD model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-13 21:25:37 -08:00 |
|
Alex Forencich
|
8b6fb5fdb2
|
ptp: Tame the control loop a bit, avoid higher gain when locked
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-13 17:30:52 -08:00 |
|
Alex Forencich
|
0461953bcc
|
ptp: Fix wraparound issue in PTP TD leaf clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-13 16:51:14 -08:00 |
|
Alex Forencich
|
9c51c6e275
|
ptp: Fix typo in PTP TD model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-12 23:11:13 -08:00 |
|
Alex Forencich
|
c247b3fc7a
|
ptp: Add PTP TD PHC control register wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-12 18:05:46 -08:00 |
|
Alex Forencich
|
86202e5263
|
cndm_proto: Connect PCIe cfg_mgmt in testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-06 15:47:14 -08:00 |
|
Alex Forencich
|
1ad0b99952
|
cndm: Connect PCIe cfg_mgmt in testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-06 15:47:04 -08:00 |
|
Alex Forencich
|
43e46044f6
|
dma: Fix typo
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-06 13:47:21 -08:00 |
|
Alex Forencich
|
7606ca328b
|
cndm_proto: Add PCIe configuration shim instance to read extended tag enable bit
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-05 14:37:42 -08:00 |
|
Alex Forencich
|
20a5166f96
|
cndm: Add PCIe configuration shim instance to read extended tag enable bit
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-05 14:37:27 -08:00 |
|
Alex Forencich
|
ddac834e99
|
pcie: Add configuration shim for UltraScale
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-02-05 14:35:01 -08:00 |
|
Alex Forencich
|
62da198a76
|
dma: Remove extraneous comma
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2026-01-18 00:13:18 -08:00 |
|