Alex Forencich
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b97eb139ca
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eth: Update XUPP3R/XUSP3S example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 22:02:32 -08:00 |
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Alex Forencich
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159c9d6241
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eth: Update example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-10-02 16:11:07 -07:00 |
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Alex Forencich
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4e66dd0f98
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eth: Rename gearbox start signals to sync
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-12 15:45:07 -07:00 |
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Alex Forencich
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e4762b7a8c
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eth: Add support for synchronous gearbox to PHY, MAC+PHY, and GT wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-30 21:14:54 -07:00 |
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Alex Forencich
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8a77ee9fc7
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eth: Add reset logic, QPLL control signals, and additional configuration parameters for US/US+ GTH/GTY transceivers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-21 21:06:45 -07:00 |
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Alex Forencich
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66b53d98a2
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Reorganize repository
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-18 12:25:59 -07:00 |
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