Commit Graph

153 Commits

Author SHA1 Message Date
Alex Forencich
cced412646 eth: Modularize Nexus K3P-Q constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-15 00:34:14 -07:00
Alex Forencich
3deab60aa4 eth: Modularize Nexus K3P/K35 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-15 00:32:37 -07:00
Alex Forencich
713e62ea23 eth: Modularize NT40E3 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-15 00:32:19 -07:00
Alex Forencich
8e416499f1 eth: Fix HTG-9200 XDC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 23:53:29 -07:00
Alex Forencich
2f1041d2f8 eth: Modularize KR260 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 23:50:55 -07:00
Alex Forencich
4c12434f10 eth: Modularize NetFPGA SUME constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 23:50:25 -07:00
Alex Forencich
c227f43556 eth: Modularize VC709 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 23:47:42 -07:00
Alex Forencich
c58e7bad58 eth: Modularize ZCU102 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 23:47:08 -07:00
Alex Forencich
42a335604c eth: Modularize HTG-940 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 23:35:51 -07:00
Alex Forencich
59a420b412 eth: Minor example design cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 22:46:47 -07:00
Alex Forencich
198b12247d eth: Modularize HTG-9200 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 17:07:33 -07:00
Alex Forencich
07342b2252 eth: Modularize ZCU111 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 00:25:10 -07:00
Alex Forencich
7d7039444b eth: Modularize XEM8320 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-14 00:04:25 -07:00
Alex Forencich
cb54131ec0 eth: Add 1000BASE-X PCS core to AC701 example design
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-13 21:24:42 -07:00
Alex Forencich
09ec52f8eb eth: Modularize Arty constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-13 16:32:45 -07:00
Alex Forencich
379a5f3b67 eth: Add Ethernet example design for AC701
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-13 14:59:37 -07:00
Alex Forencich
766e91a224 eth: Fix family in KC705 testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-13 13:26:59 -07:00
Alex Forencich
f35ff7aa32 eth: Modularize ADM_PCIE_9V3 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-09 17:17:30 -07:00
Alex Forencich
7a3e5c013e eth: Modularize AS02MC04 constraint files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-08 21:48:44 -07:00
Alex Forencich
cf9c5d5ff3 eth: Fix NT200A01/NT200A02 XDC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-06 19:31:04 -07:00
Alex Forencich
bbe4353c3a eth: Fix Alveo example design UART handling
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-05 18:26:53 -07:00
Alex Forencich
9e39b00d51 eth: Clean up multiple quad handling in Ethernet example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-05 17:35:38 -07:00
Alex Forencich
293932b1c5 eth: Add Ethernet example design for Napatech NT200A01/NT200A02
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-05 17:28:07 -07:00
Alex Forencich
4f0c8e74fa eth: Add Ethernet example design for Napatech NT20E3/NT40E3
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-03 17:23:54 -07:00
Alex Forencich
00a0f56c56 eth: Use APB 1S interconnect
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-03-19 19:12:52 -07:00
Alex Forencich
9a352ae302 eth: Update XDC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-03-18 21:27:08 -07:00
Alex Forencich
7a9e9f3370 eth: Update KC705 pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-03-13 19:51:27 -07:00
Alex Forencich
c280dd3da3 eth: Update KCU105 pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-03-13 19:44:48 -07:00
Alex Forencich
8bc90d0627 eth: Remove extra APB idle cycles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-03-13 01:24:06 -07:00
Alex Forencich
bb278958b2 eth: Clean up array init
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-03-08 14:42:08 -07:00
Alex Forencich
5df2aa3cfd eth: Use SV enums in MAC logic
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-27 15:04:08 -08:00
Alex Forencich
39638ab4d3 eth/example: Clean up unused MMCM outputs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-24 17:51:40 -08:00
Alex Forencich
146fc78a2f eth/example: XDC cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-24 17:50:10 -08:00
Alex Forencich
6f43d2b454 eth/example: Clean up hardware server commands
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-24 17:48:32 -08:00
Alex Forencich
09665325bc eth: Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-22 15:13:04 -08:00
Alex Forencich
4b3319ff0c eth: Add Ethernet example design for XEM8320 board
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-22 13:58:24 -08:00
Alex Forencich
9ace50f723 eth: Support artixuplus in MAC wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-22 13:14:59 -08:00
Alex Forencich
427aabe5d7 eth: RK-XCKU5P-F XDC cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-21 02:49:01 -08:00
Alex Forencich
1e6f5531d1 eth: Fix typo
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-20 22:15:01 -08:00
Alex Forencich
2387aa793e eth: Add Ethernet example design for RK-XCKU5P-F board
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-20 21:31:46 -08:00
Alex Forencich
add1c7aec2 eth: Fix path
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-20 21:10:04 -08:00
Alex Forencich
8fe55a6aae eth: Minor example design cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-20 13:54:48 -08:00
Alex Forencich
2ef9481d00 eth: Update example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-13 22:18:52 -08:00
Alex Forencich
31553f5734 eth: Integrate PTP TD leaf clock into MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-02-13 21:54:11 -08:00
Alex Forencich
be40d3ac2d eth: Update example design readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-01-09 16:43:01 -08:00
Alex Forencich
4b3a4b4059 eth: Capture TX tag on the first cylce of the packet
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-01-03 23:44:53 -08:00
Alex Forencich
d1bba66104 eth: Fix MAC padding bug in 32-bit MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-01-02 01:19:53 -08:00
Alex Forencich
7449dcfdc3 eth/example: Use logging.getLogger instead of SimLog
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-17 21:34:06 -08:00
Alex Forencich
75d28d5adb eth: Clean up MGT pin connections in example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-14 12:07:26 -08:00
Alex Forencich
729bf79427 eth: Move link speed detection logic from MAC wrapper to PHY interface
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-13 21:27:03 -08:00