Alex Forencich
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d1bba66104
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eth: Fix MAC padding bug in 32-bit MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-01-02 01:19:53 -08:00 |
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Alex Forencich
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59a3d5f511
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eth: Normalize signal and register names in MAC modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-10-05 18:11:27 -07:00 |
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Alex Forencich
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caeacadb78
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eth: Clean up masking, lane 0 never needs to be masked
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-10-04 20:06:58 -07:00 |
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Alex Forencich
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0e2acbf482
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eth: Fix 2D array declarations
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-10-04 11:02:30 -07:00 |
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Alex Forencich
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04df834708
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eth: Optimize frame length enforcement logic in BASE-R MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-10-03 15:49:51 -07:00 |
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Alex Forencich
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f4e36bd081
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eth: Optimize padding logic in BASE-R MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-10-02 23:08:11 -07:00 |
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Alex Forencich
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ebb8bf0bd4
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eth: Add 32-bit AXI stream BASE-R TX module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-17 20:14:30 -07:00 |
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