Alex Forencich
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f69e6a8c12
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cndm: Implement command status codes and error handling
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-17 17:41:08 -07:00 |
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Alex Forencich
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cc888b2cca
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cndm: Add support to core logic for board control logic
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-17 14:32:15 -07:00 |
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Alex Forencich
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c37d967de9
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cndm: Add consumer pointer and arm bit to completion queue
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-09 14:50:07 -07:00 |
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Alex Forencich
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e514869d70
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cndm: Clean up resource handling in datapath manager
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-09 00:56:27 -07:00 |
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Alex Forencich
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9af793edc6
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cndm: Parameter cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-08 17:39:28 -07:00 |
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Alex Forencich
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283ef97cec
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cndm: Initialize ID ROM differently to make Vivado happy
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-08 01:01:44 -08:00 |
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Alex Forencich
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dde401e095
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cndm: Add config command to read config data from HW
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-07 23:12:40 -08:00 |
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Alex Forencich
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09f1b278e8
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cndm: Make scratch registers more generic in datapath manager
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-07 23:12:02 -08:00 |
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Alex Forencich
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ce8da1bc59
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cndm: Fully share SQ/RQ HW resources
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-06 15:23:20 -08:00 |
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Alex Forencich
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595d744aa4
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cndm: Add qtype field to queue state to enable sharing
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-05 22:12:39 -08:00 |
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Alex Forencich
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8263ebab24
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cndm: Move SQ/RQ state into distributed RAM
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-05 20:49:35 -08:00 |
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Alex Forencich
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7dbe6df56a
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cndm: Peel off queue management logic, store queue state in distributed RAM
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-05 18:04:43 -08:00 |
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Alex Forencich
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6bf7240686
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cndm: Rework desc/cpl mux/demux logic, add support for CQNs, implement queue allocation
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-03 18:09:38 -08:00 |
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Alex Forencich
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4d8f0cfece
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cndm: Move control registers out of port module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-03 13:31:16 -08:00 |
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Alex Forencich
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0d4a030e3f
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cndm: Add PTP command
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-02 18:27:33 -08:00 |
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Alex Forencich
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0f09b8bdaa
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cndm: Add register access command
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-02 00:33:31 -08:00 |
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Alex Forencich
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32b073ade9
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cndm: Fix widths
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-01 14:02:39 -08:00 |
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Alex Forencich
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e27b5c0b94
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cndm: Initial implementation of command interface
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2026-03-01 13:16:24 -08:00 |
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