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04df8347086dfe3f3fbae9992fc860ce9126bc66
taxi/src/eth/rtl
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Alex Forencich 04df834708 eth: Optimize frame length enforcement logic in BASE-R MACs 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-10-03 15:49:51 -07:00
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us
eth: Convert UltraScale wrapper to use unpacked arrays for channels
2025-10-02 16:10:37 -07:00
taxi_axis_baser_rx_32.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
2025-10-03 15:49:51 -07:00
taxi_axis_baser_rx_64.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
2025-10-03 15:49:51 -07:00
taxi_axis_baser_tx_32.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
2025-10-03 15:49:51 -07:00
taxi_axis_baser_tx_64.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
2025-10-03 15:49:51 -07:00
taxi_axis_gmii_rx.sv
lfsr: Add input and output enable parameters to LFSR module to remove dead code
2025-06-10 19:08:55 -07:00
taxi_axis_gmii_tx.sv
lfsr: Add input and output enable parameters to LFSR module to remove dead code
2025-06-10 19:08:55 -07:00
taxi_axis_xgmii_rx_32.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
2025-10-03 15:49:51 -07:00
taxi_axis_xgmii_rx_64.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
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taxi_axis_xgmii_tx_32.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
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taxi_axis_xgmii_tx_64.sv
eth: Optimize frame length enforcement logic in BASE-R MACs
2025-10-03 15:49:51 -07:00
taxi_eth_mac_1g_fifo.f
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taxi_eth_mac_1g_fifo.sv
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taxi_eth_mac_1g_gmii_fifo.f
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taxi_eth_mac_1g_gmii_fifo.sv
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taxi_eth_mac_1g_gmii.f
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taxi_eth_mac_1g_gmii.sv
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taxi_eth_mac_1g_rgmii_fifo.f
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taxi_eth_mac_1g_rgmii_fifo.sv
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taxi_eth_mac_1g_rgmii.f
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taxi_eth_mac_1g_rgmii.sv
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taxi_eth_mac_1g.f
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taxi_eth_mac_1g.sv
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taxi_eth_mac_10g_fifo.f
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taxi_eth_mac_10g_fifo.sv
eth: Remove extraneous defaults
2025-06-13 16:45:00 -07:00
taxi_eth_mac_10g.f
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2025-05-18 12:25:59 -07:00
taxi_eth_mac_10g.sv
eth: Support 32-bit sync gearbox in 10G MAC
2025-06-15 13:11:26 -07:00
taxi_eth_mac_mii_fifo.f
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taxi_eth_mac_mii_fifo.sv
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taxi_eth_mac_mii.f
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taxi_eth_mac_mii.sv
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taxi_eth_mac_phy_10g_fifo.f
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taxi_eth_mac_phy_10g_fifo.sv
eth: Rename gearbox start signals to sync
2025-06-12 15:45:07 -07:00
taxi_eth_mac_phy_10g_rx.f
eth: Add 32-bit support to combined MAC+PCS module
2025-06-17 21:37:34 -07:00
taxi_eth_mac_phy_10g_rx.sv
eth: Add 32-bit support to combined MAC+PCS module
2025-06-17 21:37:34 -07:00
taxi_eth_mac_phy_10g_tx.f
eth: Add 32-bit support to combined MAC+PCS module
2025-06-17 21:37:34 -07:00
taxi_eth_mac_phy_10g_tx.sv
eth: Add 32-bit support to combined MAC+PCS module
2025-06-17 21:37:34 -07:00
taxi_eth_mac_phy_10g.f
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taxi_eth_mac_phy_10g.sv
eth: Fix parameter name
2025-06-13 16:40:32 -07:00
taxi_eth_mac_stats.f
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taxi_eth_mac_stats.sv
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taxi_eth_phy_10g_rx_ber_mon.sv
eth: Fix RX BER monitor when gearbox is enabled
2025-06-15 12:54:01 -07:00
taxi_eth_phy_10g_rx_frame_sync.sv
eth: PHY parameter clean-up, support 32-bit mode in PHY interface modules
2025-06-14 22:54:09 -07:00
taxi_eth_phy_10g_rx_if.f
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taxi_eth_phy_10g_rx_if.sv
eth: PHY parameter clean-up, support 32-bit mode in PHY interface modules
2025-06-14 22:54:09 -07:00
taxi_eth_phy_10g_rx_watchdog.sv
eth: PHY parameter clean-up, support 32-bit mode in PHY interface modules
2025-06-14 22:54:09 -07:00
taxi_eth_phy_10g_rx.f
eth: Support 32 bit mode in BASE-R PHY
2025-06-15 13:00:14 -07:00
taxi_eth_phy_10g_rx.sv
eth: Support 32 bit mode in BASE-R PHY
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taxi_eth_phy_10g_tx_if.f
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taxi_eth_phy_10g_tx_if.sv
eth: PHY parameter clean-up, support 32-bit mode in PHY interface modules
2025-06-14 22:54:09 -07:00
taxi_eth_phy_10g_tx.f
eth: Support 32 bit mode in BASE-R PHY
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taxi_eth_phy_10g_tx.sv
eth: Support 32 bit mode in BASE-R PHY
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taxi_eth_phy_10g.f
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taxi_eth_phy_10g.sv
eth: Remove extraneous defaults
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taxi_gmii_phy_if.f
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taxi_gmii_phy_if.sv
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taxi_mac_ctrl_rx.sv
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taxi_mac_ctrl_tx.sv
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taxi_mac_pause_ctrl_rx.sv
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taxi_mac_pause_ctrl_tx.sv
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taxi_mii_phy_if.f
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taxi_mii_phy_if.sv
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taxi_rgmii_phy_if.f
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taxi_rgmii_phy_if.sv
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taxi_xgmii_baser_dec.sv
eth: Support 32 bit mode in BASE-R PHY
2025-06-15 13:00:14 -07:00
taxi_xgmii_baser_enc.sv
eth: Support 32 bit mode in BASE-R PHY
2025-06-15 13:00:14 -07:00