David Banks
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4f141c7a13
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Merge remote-tracking branch 'upstream/master'
Change-Id: I754ba57320720ff7f46e34d80b1719a37dcd3d1e
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2021-06-10 11:19:41 +01:00 |
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David Banks
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fec47c5427
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Fix synthesis warnings, add SYNC output
Change-Id: If14a39f0621803c7105d6289aca9621c2ff67b99
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2021-06-10 11:17:32 +01:00 |
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David Banks
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9c1181b5e1
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Remove trailing whitespace
Change-Id: I25e1b337211032bb572351f8a02d3b05013330ea
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2021-06-10 11:16:20 +01:00 |
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Arlet Ottens
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e6f361d764
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Updated README
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2020-10-21 12:12:56 +02:00 |
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Arlet Ottens
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a11631082b
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Added fix for 1-cycle RDY bug
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2016-08-19 20:19:40 +02:00 |
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David Banks
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791ed43bae
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Updated README and 65C02 Copyright
Change-Id: I88efe06d7959744165c35b54edf6e3633ff05406
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2016-08-01 12:36:46 +01:00 |
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David Banks
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4053c24317
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Arlet 65C02 WIP: Implement correct 65C02 BCD N/Z flags (optional, disabled)
Change-Id: Ib72bcc1a100ee3c642048ce195bf1424feb4bf50
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2016-08-01 12:02:45 +01:00 |
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David Banks
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bf3dad7af1
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Arlet 65C02 WIP: Implement NOPs (optional)
Change-Id: I96f1f9dd23f201ff017aaf6c2c69ad40ec928ea2
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2016-08-01 12:01:44 +01:00 |
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David Banks
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db83fd4af9
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Arlet 65C02 WIP: Implement JMP (,X)
Change-Id: I4a216b446ae23e05138d574875dbe54cccc052eb
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2016-08-01 12:01:04 +01:00 |
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David Banks
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05e5f633f7
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Arlet 65C02 WIP: Implement TSB/TXB
Change-Id: I3a452d03a4f8872f3b0232e174ec9dbcb5ec4f0f
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2016-08-01 12:00:29 +01:00 |
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David Banks
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c5f486730e
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Arlet 65C02 WIP: Implement BIT zpx, absx, imm
Change-Id: Ifa929f0383c3d90af679da9963a6ec087ca5abca
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2016-08-01 11:59:46 +01:00 |
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David Banks
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5ac9ffdd0f
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Arlet 65C02 WIP: Implement STZ
Change-Id: I5816f4f45faa756a3157733814503c30bda70970
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2016-08-01 11:58:59 +01:00 |
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David Banks
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473b5bdcab
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Arlet 65C02 WIP: Cosmetic
Change-Id: I9c9c1d612f254fd7c36a6d3425c6824fcbfc7c3c
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2016-08-01 11:58:14 +01:00 |
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David Banks
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5a7224efe0
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Arlet 65C02 WIP: Implement (zp) addressing mode
Change-Id: I5ae6506c8ad403cc8a6ca2004c09d4df84a7f5df
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2016-08-01 11:57:23 +01:00 |
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David Banks
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d7fdd129b1
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Arlet 65C02 WIP: Implement INC A, DEC A
Change-Id: Ia23480b061278092e328682370b1a545990c9e17
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2016-08-01 11:56:41 +01:00 |
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David Banks
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7418b64cd9
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Arlet 65C02 WIP: Implement BRA
Change-Id: If732b295d84011212269974b48d3f7a8da6804dc
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2016-08-01 11:56:01 +01:00 |
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David Banks
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aea27b38d7
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Arlet 65C02 WIP: Implement PLX,PHX,PLY,PHY
Change-Id: If6daef719d9c897fd6a5bd345c972d1f350e14da
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2016-08-01 11:55:02 +01:00 |
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David Banks
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0b422c8d71
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Arlet 65C02 WIP: Copied cpu.v to cpu_65c02.v and renamed module
Change-Id: I2fe4899bb2978a63f698a991859f3c90406cca21
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2016-08-01 11:54:04 +01:00 |
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Arlet Ottens
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ae653ab688
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Added clarification of memory interface
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2015-08-31 20:25:47 +02:00 |
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Arlet Ottens
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dff3abaaac
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fix for bit/logic verilator keywords
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2014-10-23 20:33:44 +02:00 |
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Arlet Ottens
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74e83fa07f
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Speed up ALU path
Move calculation of V and Z flags into next pipeline stage
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2012-10-06 16:21:37 +02:00 |
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Arlet Ottens
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071e7fc9be
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Fix syntax error
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2012-10-06 16:20:49 +02:00 |
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Arlet
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3a0dfb7336
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Removed $display debug
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2012-08-12 08:34:14 +02:00 |
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Arlet
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55c26f780b
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Fixed verification bugs
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2012-08-12 08:30:19 +02:00 |
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Arlet
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a89c839d29
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Added RDY term to AB Hold update
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2011-10-08 17:52:03 +02:00 |
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Arlet
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6796444f2c
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fixed typo
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2011-10-02 12:23:40 +02:00 |
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Arlet
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3678fc4f4e
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Make SEI/CLI take effect one cycle earlier.
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2011-09-27 07:17:15 +02:00 |
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Arlet
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9b58705596
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Do not set ABH/ABL in push/pull to avoid wrong PC being pushed if IRQ follows
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2011-09-27 07:14:23 +02:00 |
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Arlet
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b1472bfe31
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Fixed 'load_reg' for CLC/SEC/CLI/SEI/CLV/CLD/SED
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2011-09-27 07:11:13 +02:00 |
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Arlet
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c51aa17b6b
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Fixed '=' back to '<=' for 'backwards' signal.
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2011-06-08 06:54:11 +02:00 |
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Arlet
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e54964f9dd
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Replaced <= by = in combinatorial blocks
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2011-05-22 15:55:36 +02:00 |
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Arlet
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c305e6d3ef
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Added support for RDY
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2011-05-16 14:31:22 +02:00 |
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Arlet
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5fe44f4b7f
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first commit
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2011-05-02 19:04:14 +02:00 |
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