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fpga-sim
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Byron Lathi
934160d619
Limit number of jobs for verilator
2025-02-25 08:09:11 -08:00
src
/fpga_sim
Limit number of jobs for verilator
2025-02-25 08:09:11 -08:00
.gitignore
Initial commit
2024-11-29 22:31:03 -08:00
.gitlab-ci.yml
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init_env.sh
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LICENSE.txt
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pyproject.toml
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README.md
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requirements.txt
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README.md
FPGA Sim
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Python
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