bslathi19/fpga-sim
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Byron Lathi a3d4973cc1
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Fix verilator control files
2025-11-22 16:22:09 -08:00
.gitea/workflows
Add actions
2025-11-08 14:33:28 -08:00
src/fpga_sim
Fix verilator control files
2025-11-22 16:22:09 -08:00
.gitignore
Initial commit
2024-11-29 22:31:03 -08:00
.gitlab-ci.yml
Initial commit
2024-11-29 22:31:03 -08:00
init_env.sh
Initial commit
2024-11-29 22:31:03 -08:00
LICENSE.txt
Initial commit
2024-11-29 22:31:03 -08:00
pyproject.toml
Fix for cocotb 2
2025-11-22 16:12:57 -08:00
README.md
Initial commit
2024-11-29 22:31:03 -08:00
requirements.txt
Experimental/incdirs
2025-03-21 05:45:28 +00:00

README.md

FPGA Sim

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Description
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Readme 107 KiB
Languages
Python 98%
Shell 2%