bslathi19/fpga-sim
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
20 Commits 6 Branches 0 Tags
c22bf1eb0bab2ac694fc27731497058bc7c6677a
Go to file
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
Byron Lathi c22bf1eb0b Add timing option 
todo: add args from yaml
2025-07-16 22:30:16 -07:00
src/fpga_sim
Add timing option
2025-07-16 22:30:16 -07:00
.gitignore
Initial commit
2024-11-29 22:31:03 -08:00
.gitlab-ci.yml
Initial commit
2024-11-29 22:31:03 -08:00
init_env.sh
Initial commit
2024-11-29 22:31:03 -08:00
LICENSE.txt
Initial commit
2024-11-29 22:31:03 -08:00
pyproject.toml
Add timing option
2025-07-16 22:30:16 -07:00
README.md
Initial commit
2024-11-29 22:31:03 -08:00
requirements.txt
Experimental/incdirs
2025-03-21 05:45:28 +00:00

README.md

FPGA Sim

Reference in New Issue View Git Blame Copy Permalink
Description
No description provided
Readme 107 KiB
Languages
Python 98%
Shell 2%