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148
fpga/ip/EfxSapphireHpSoc_slb/EfxSapphireHpSoc_slb_tmpl.v
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148
fpga/ip/EfxSapphireHpSoc_slb/EfxSapphireHpSoc_slb_tmpl.v
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// =============================================================================
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// Generated by efx_ipmgr
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// Version: 2025.2.272
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// IP Version: 1.22.0
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// =============================================================================
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////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2013-2025 Efinix Inc. All rights reserved.
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//
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// This document contains proprietary information which is
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// protected by copyright. All rights are reserved. This notice
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// refers to original work by Efinix, Inc. which may be derivitive
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// of other work distributed under license of the authors. In the
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// case of derivative work, nothing in this notice overrides the
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// original author's license agreement. Where applicable, the
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// original license agreement is included in it's original
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// unmodified form immediately below this header.
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//
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// WARRANTY DISCLAIMER.
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// THE DESIGN, CODE, OR INFORMATION ARE PROVIDED “AS IS” AND
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// EFINIX MAKES NO WARRANTIES, EXPRESS OR IMPLIED WITH
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// RESPECT THERETO, AND EXPRESSLY DISCLAIMS ANY IMPLIED WARRANTIES,
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// INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
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// MERCHANTABILITY, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR
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// PURPOSE. SOME STATES DO NOT ALLOW EXCLUSIONS OF AN IMPLIED
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// WARRANTY, SO THIS DISCLAIMER MAY NOT APPLY TO LICENSEE.
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//
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// LIMITATION OF LIABILITY.
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// NOTWITHSTANDING ANYTHING TO THE CONTRARY, EXCEPT FOR BODILY
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// INJURY, EFINIX SHALL NOT BE LIABLE WITH RESPECT TO ANY SUBJECT
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// MATTER OF THIS AGREEMENT UNDER TORT, CONTRACT, STRICT LIABILITY
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// OR ANY OTHER LEGAL OR EQUITABLE THEORY (I) FOR ANY INDIRECT,
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// SPECIAL, INCIDENTAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES OF ANY
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// CHARACTER INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF
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// GOODWILL, DATA OR PROFIT, WORK STOPPAGE, OR COMPUTER FAILURE OR
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// MALFUNCTION, OR IN ANY EVENT (II) FOR ANY AMOUNT IN EXCESS, IN
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// THE AGGREGATE, OF THE FEE PAID BY LICENSEE TO EFINIX HEREUNDER
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// (OR, IF THE FEE HAS BEEN WAIVED, $100), EVEN IF EFINIX SHALL HAVE
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// BEEN INFORMED OF THE POSSIBILITY OF SUCH DAMAGES. SOME STATES DO
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// NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR
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// CONSEQUENTIAL DAMAGES, SO THIS LIMITATION AND EXCLUSION MAY NOT
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// APPLY TO LICENSEE.
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//
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////////////////////////////////////////////////////////////////////////////////
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EfxSapphireHpSoc_slb u_EfxSapphireHpSoc_slb
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(
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.io_peripheralClk ( io_peripheralClk ),
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.io_peripheralReset ( io_peripheralReset ),
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.io_asyncReset ( io_asyncReset ),
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.io_gpio_sw_n ( io_gpio_sw_n ),
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.pll_peripheral_locked ( pll_peripheral_locked ),
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.pll_system_locked ( pll_system_locked ),
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.jtagCtrl_capture ( jtagCtrl_capture ),
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.jtagCtrl_enable ( jtagCtrl_enable ),
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.jtagCtrl_reset ( jtagCtrl_reset ),
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.jtagCtrl_shift ( jtagCtrl_shift ),
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.jtagCtrl_tdi ( jtagCtrl_tdi ),
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.jtagCtrl_tdo ( jtagCtrl_tdo ),
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.jtagCtrl_update ( jtagCtrl_update ),
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.ut_jtagCtrl_capture ( ut_jtagCtrl_capture ),
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.ut_jtagCtrl_enable ( ut_jtagCtrl_enable ),
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.ut_jtagCtrl_reset ( ut_jtagCtrl_reset ),
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.ut_jtagCtrl_shift ( ut_jtagCtrl_shift ),
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.ut_jtagCtrl_tdi ( ut_jtagCtrl_tdi ),
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.ut_jtagCtrl_tdo ( ut_jtagCtrl_tdo ),
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.ut_jtagCtrl_update ( ut_jtagCtrl_update ),
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.system_spi_0_io_data_0_read ( system_spi_0_io_data_0_read ),
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.system_spi_0_io_data_0_write ( system_spi_0_io_data_0_write ),
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.system_spi_0_io_data_0_writeEnable ( system_spi_0_io_data_0_writeEnable ),
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.system_spi_0_io_data_1_read ( system_spi_0_io_data_1_read ),
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.system_spi_0_io_data_1_write ( system_spi_0_io_data_1_write ),
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.system_spi_0_io_data_1_writeEnable ( system_spi_0_io_data_1_writeEnable ),
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.system_spi_0_io_data_2_read ( system_spi_0_io_data_2_read ),
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.system_spi_0_io_data_2_write ( system_spi_0_io_data_2_write ),
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.system_spi_0_io_data_2_writeEnable ( system_spi_0_io_data_2_writeEnable ),
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.system_spi_0_io_data_3_read ( system_spi_0_io_data_3_read ),
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.system_spi_0_io_data_3_write ( system_spi_0_io_data_3_write ),
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.system_spi_0_io_data_3_writeEnable ( system_spi_0_io_data_3_writeEnable ),
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.system_spi_0_io_sclk_write ( system_spi_0_io_sclk_write ),
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.system_spi_0_io_ss ( system_spi_0_io_ss ),
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.system_uart_0_io_rxd ( system_uart_0_io_rxd ),
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.system_uart_0_io_txd ( system_uart_0_io_txd ),
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.system_i2c_0_io_scl_read ( system_i2c_0_io_scl_read ),
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.system_i2c_0_io_scl_write ( system_i2c_0_io_scl_write ),
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.system_i2c_0_io_sda_read ( system_i2c_0_io_sda_read ),
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.system_gpio_0_io_read ( system_gpio_0_io_read ),
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.system_gpio_0_io_write ( system_gpio_0_io_write ),
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.system_gpio_0_io_writeEnable ( system_gpio_0_io_writeEnable ),
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.cfg_done ( cfg_done ),
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.cfg_start ( cfg_start ),
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.cfg_sel ( cfg_sel ),
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.cfg_reset ( cfg_reset ),
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.axiAInterrupt ( axiAInterrupt ),
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.axiA_awaddr ( axiA_awaddr ),
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.axiA_awlen ( axiA_awlen ),
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.axiA_awsize ( axiA_awsize ),
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.axiA_awburst ( axiA_awburst ),
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.axiA_awlock ( axiA_awlock ),
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.axiA_awcache ( axiA_awcache ),
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.axiA_awprot ( axiA_awprot ),
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.axiA_awqos ( axiA_awqos ),
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.axiA_awregion ( axiA_awregion ),
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.axiA_awvalid ( axiA_awvalid ),
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.axiA_awready ( axiA_awready ),
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.axiA_wdata ( axiA_wdata ),
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.axiA_wstrb ( axiA_wstrb ),
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.axiA_wvalid ( axiA_wvalid ),
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.axiA_wlast ( axiA_wlast ),
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.axiA_wready ( axiA_wready ),
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.axiA_bresp ( axiA_bresp ),
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.axiA_bvalid ( axiA_bvalid ),
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.axiA_bready ( axiA_bready ),
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.axiA_araddr ( axiA_araddr ),
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.axiA_arlen ( axiA_arlen ),
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.axiA_arsize ( axiA_arsize ),
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.axiA_arburst ( axiA_arburst ),
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.axiA_arlock ( axiA_arlock ),
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.axiA_arcache ( axiA_arcache ),
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.axiA_arprot ( axiA_arprot ),
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.axiA_arqos ( axiA_arqos ),
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.axiA_arregion ( axiA_arregion ),
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.axiA_arvalid ( axiA_arvalid ),
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.axiA_arready ( axiA_arready ),
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.axiA_rdata ( axiA_rdata ),
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.axiA_rresp ( axiA_rresp ),
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.axiA_rlast ( axiA_rlast ),
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.axiA_rvalid ( axiA_rvalid ),
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.axiA_rready ( axiA_rready ),
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.userInterruptA ( userInterruptA ),
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.userInterruptB ( userInterruptB ),
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.userInterruptC ( userInterruptC ),
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.userInterruptD ( userInterruptD ),
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.userInterruptE ( userInterruptE ),
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.userInterruptF ( userInterruptF ),
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.io_apbSlave_0_PADDR ( io_apbSlave_0_PADDR ),
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.io_apbSlave_0_PENABLE ( io_apbSlave_0_PENABLE ),
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.io_apbSlave_0_PRDATA ( io_apbSlave_0_PRDATA ),
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.io_apbSlave_0_PREADY ( io_apbSlave_0_PREADY ),
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.io_apbSlave_0_PSEL ( io_apbSlave_0_PSEL ),
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.io_apbSlave_0_PSLVERROR ( io_apbSlave_0_PSLVERROR ),
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.io_apbSlave_0_PWDATA ( io_apbSlave_0_PWDATA ),
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.io_apbSlave_0_PWRITE ( io_apbSlave_0_PWRITE ),
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.system_i2c_0_io_sda_write ( system_i2c_0_io_sda_write ),
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.system_i2c_0_io_sda_writeEnable ( system_i2c_0_io_sda_writeEnable ),
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.system_i2c_0_io_scl_writeEnable ( system_i2c_0_io_scl_writeEnable ),
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.system_watchdog_hardPanic_reset ( system_watchdog_hardPanic_reset )
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);
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