initial commit

fpga/ip/EfxSapphireHpSoc_slb/hard_ip_args.ini

@@ -0,0 +1,224 @@
+[parameters]
+pll_soc_sys_clk_name = soc_pll_sys_clk
+hidden_min_freq = 0
+pll_soc_sys_clk_ref_freq_hidden = 100
+pll_soc_sys_clk_ref_freq = 100
+pll_soc_sys_clkout1_freq = 1000
+pll_soc_sys_clkout1_phase = 0
+pll_soc_sys_clkout2_freq = 250
+pll_soc_sys_clkout2_phase = 0
+pll_soc_mem_clk_name = soc_pll_peri_clk
+pll_soc_mem_clk_ref_freq = 25
+pll_soc_mem_clkout1_freq = 250
+pll_soc_mem_clkout1_phase = 0
+pll_soc_mem_clkout2_freq = 250
+pll_soc_mem_clkout2_phase = 0
+pll_lpddr4_name = soc_ddr_pll
+pll_lpddr4_ref_freq = 25
+pll_lpddr4_clkout0_freq = 100
+pll_lpddr4_clkout0_phase = 0
+pll_lpddr4_clkout3_freq = 533
+pll_lpddr4_clkout3_phase = 0
+ddr_data_width = 32
+ddr_memory_density = 8G
+ddr_memory_type = LPDDR4x
+ddr_physical_rank = 1
+ddr_pin_name = soc_ddr_inst1
+gpio_bus_name = system_gpio_0
+hard_jtag_inst_name = soc_jtag_inst1
+uart0_gpio_inst_name = system_uart_0
+spi0_gpio_inst_name = system_spi_0
+i2c0_gpio_inst_name = system_i2c_0
+jtag_gpio_inst_name = io_jtag
+soc_pin_name = qcrv32_inst1
+intf_axim = 1
+intf_ci_0 = 1
+intf_ci_1 = 1
+intf_ci_2 = 1
+intf_ci_3 = 1
+co_debug = 0
+intf_jtag_type = 0
+intf_uintr = 9
+peri_spi_0 = 1
+peri_spi_1 = 0
+peri_spi_2 = 0
+peri_i2c_0 = 1
+peri_i2c_1 = 0
+peri_i2c_2 = 0
+peri_gpio_0 = 1
+peri_gpio_1 = 0
+peri_wdt_0 = 1
+peri_apb_0 = 1
+peri_apb_1 = 0
+peri_apb_2 = 0
+peri_apb_3 = 0
+peri_apb_4 = 0
+peri_gen = 1
+peri_uart_0 = 1
+peri_uart_1 = 0
+peri_uart_2 = 0
+peri_gpio_0_width = 4
+peri_gpio_1_width = 4
+peri_apb_0_size = 65536
+peri_apb_1_size = 4096
+peri_apb_2_size = 4096
+peri_apb_3_size = 4096
+peri_apb_4_size = 4096
+peri_freq = 200
+app_overwrite = 0
+app_overwrite_path = 
+peri_count = 6
+peri_tcount = 6
+intf_jtag_tap_sel = 8
+intf_axis = 1
+peri_pin_assign = 1
+pll_soc_mem_resource = PLL_TR0
+sys_freq = 1000
+sys_freq_hidden = 1000
+pll_soc_sys_clkout3_freq = 250
+pll_soc_sys_clkout3_phase = 0
+pll_soc_mem_clkout3_freq = 250
+pll_soc_mem_clkout3_phase = 0
+pll_soc_mem_clkout4_freq = 200
+pll_soc_mem_clkout4_phase = 0
+pll_soc_sys_resource = PLL_BL0
+pll_lpddr4_resource = PLL_BL2
+pll_res_assign = 0
+pll_soc_sys_clkout0_freq = 100
+pll_soc_sys_clkout0_phase = 0
+pll_soc_mem_clkout0_freq = 100
+pll_soc_mem_clkout0_phase = 0
+pll_lpddr4_clkout1_freq = 33
+pll_lpddr4_clkout1_phase = 0
+mem_freq = 250
+axim_freq = 250
+cfu_freq = 125
+ddr_freq = 800
+pll_res_assign_2 = 0
+ddr_res_assign = 0
+peri_res_assign = 0
+pll_soc_sys_ext_clk_src = 1
+pll_soc_mem_ext_clk_src = 0
+peri_sdhc = 0
+peri_tsemac = 0
+sw_ftdi_ch_num = 6011
+sw_app_size = 2044
+sw_app_size_custom = 0
+sw_stack_size = 8
+sw_stack_size_custom = 0
+sw_board = Ti375C529 Development Kit
+sw_board_custom = 
+sw_ftdi_target_ch = 1
+sw_ftdi_ch_num_soft = 6011
+sw_ftdi_target_ch_soft = 0
+sw_frtos_app_size = 16380
+sw_frtos_app_size_custom = 0
+sw_frtos_stack_size = 4
+sw_frtos_stack_size_custom = 0
+package_type = 529
+family_type = TITANIUM
+axi_pipeline = 0
+axi_write_buffer = 0
+
+[ports]
+io_peripheralclk = io_peripheralClk
+io_peripheralreset = io_peripheralReset
+io_asyncreset = io_asyncReset
+io_gpio_sw_n = io_gpio_sw_n
+pll_peripheral_locked = pll_peripheral_locked
+pll_system_locked = pll_system_locked
+jtagctrl_capture = jtagCtrl_capture
+jtagctrl_enable = jtagCtrl_enable
+jtagctrl_reset = jtagCtrl_reset
+jtagctrl_shift = jtagCtrl_shift
+jtagctrl_tdi = jtagCtrl_tdi
+jtagctrl_tdo = jtagCtrl_tdo
+jtagctrl_update = jtagCtrl_update
+ut_jtagctrl_capture = ut_jtagCtrl_capture
+ut_jtagctrl_enable = ut_jtagCtrl_enable
+ut_jtagctrl_reset = ut_jtagCtrl_reset
+ut_jtagctrl_shift = ut_jtagCtrl_shift
+ut_jtagctrl_tdi = ut_jtagCtrl_tdi
+ut_jtagctrl_tdo = ut_jtagCtrl_tdo
+ut_jtagctrl_update = ut_jtagCtrl_update
+system_spi_0_io_data_0_read = system_spi_0_io_data_0_read
+system_spi_0_io_data_0_write = system_spi_0_io_data_0_write
+system_spi_0_io_data_0_writeenable = system_spi_0_io_data_0_writeEnable
+system_spi_0_io_data_1_read = system_spi_0_io_data_1_read
+system_spi_0_io_data_1_write = system_spi_0_io_data_1_write
+system_spi_0_io_data_1_writeenable = system_spi_0_io_data_1_writeEnable
+system_spi_0_io_data_2_read = system_spi_0_io_data_2_read
+system_spi_0_io_data_2_write = system_spi_0_io_data_2_write
+system_spi_0_io_data_2_writeenable = system_spi_0_io_data_2_writeEnable
+system_spi_0_io_data_3_read = system_spi_0_io_data_3_read
+system_spi_0_io_data_3_write = system_spi_0_io_data_3_write
+system_spi_0_io_data_3_writeenable = system_spi_0_io_data_3_writeEnable
+system_spi_0_io_sclk_write = system_spi_0_io_sclk_write
+system_spi_0_io_ss = system_spi_0_io_ss
+system_uart_0_io_rxd = system_uart_0_io_rxd
+system_uart_0_io_txd = system_uart_0_io_txd
+system_i2c_0_io_scl_read = system_i2c_0_io_scl_read
+system_i2c_0_io_scl_write = system_i2c_0_io_scl_write
+system_i2c_0_io_sda_read = system_i2c_0_io_sda_read
+system_gpio_0_io_read = system_gpio_0_io_read
+system_gpio_0_io_write = system_gpio_0_io_write
+system_gpio_0_io_writeenable = system_gpio_0_io_writeEnable
+cfg_done = cfg_done
+cfg_start = cfg_start
+cfg_sel = cfg_sel
+cfg_reset = cfg_reset
+axiainterrupt = axiAInterrupt
+axia_awaddr = axiA_awaddr
+axia_awlen = axiA_awlen
+axia_awsize = axiA_awsize
+axia_awburst = axiA_awburst
+axia_awlock = axiA_awlock
+axia_awcache = axiA_awcache
+axia_awprot = axiA_awprot
+axia_awqos = axiA_awqos
+axia_awregion = axiA_awregion
+axia_awvalid = axiA_awvalid
+axia_awready = axiA_awready
+axia_wdata = axiA_wdata
+axia_wstrb = axiA_wstrb
+axia_wvalid = axiA_wvalid
+axia_wlast = axiA_wlast
+axia_wready = axiA_wready
+axia_bresp = axiA_bresp
+axia_bvalid = axiA_bvalid
+axia_bready = axiA_bready
+axia_araddr = axiA_araddr
+axia_arlen = axiA_arlen
+axia_arsize = axiA_arsize
+axia_arburst = axiA_arburst
+axia_arlock = axiA_arlock
+axia_arcache = axiA_arcache
+axia_arprot = axiA_arprot
+axia_arqos = axiA_arqos
+axia_arregion = axiA_arregion
+axia_arvalid = axiA_arvalid
+axia_arready = axiA_arready
+axia_rdata = axiA_rdata
+axia_rresp = axiA_rresp
+axia_rlast = axiA_rlast
+axia_rvalid = axiA_rvalid
+axia_rready = axiA_rready
+userinterrupta = userInterruptA
+userinterruptb = userInterruptB
+userinterruptc = userInterruptC
+userinterruptd = userInterruptD
+userinterrupte = userInterruptE
+userinterruptf = userInterruptF
+io_apbslave_0_paddr = io_apbSlave_0_PADDR
+io_apbslave_0_penable = io_apbSlave_0_PENABLE
+io_apbslave_0_prdata = io_apbSlave_0_PRDATA
+io_apbslave_0_pready = io_apbSlave_0_PREADY
+io_apbslave_0_psel = io_apbSlave_0_PSEL
+io_apbslave_0_pslverror = io_apbSlave_0_PSLVERROR
+io_apbslave_0_pwdata = io_apbSlave_0_PWDATA
+io_apbslave_0_pwrite = io_apbSlave_0_PWRITE
+system_i2c_0_io_sda_write = system_i2c_0_io_sda_write
+system_i2c_0_io_sda_writeenable = system_i2c_0_io_sda_writeEnable
+system_i2c_0_io_scl_writeenable = system_i2c_0_io_scl_writeEnable
+system_watchdog_hardpanic_reset = system_watchdog_hardPanic_reset
+