Byron Lathi
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40fe95ea0a
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Add checksum calc to fpga sources
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2024-09-14 15:26:22 -07:00 |
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Byron Lathi
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f742d9d89f
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Add TCP calculator
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2024-09-14 15:24:28 -07:00 |
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Byron Lathi
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fa80cab104
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Length hacked a little less, hack window size
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2024-09-13 08:23:00 -07:00 |
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Byron Lathi
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22fabf10f7
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Hack length in
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2024-09-13 08:06:36 -07:00 |
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Byron Lathi
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b815af3ff1
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Make a pcapng file, not pcap
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2024-09-13 07:41:17 -07:00 |
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Byron Lathi
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8455d5b56d
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Handle ack in synack, write to pcap
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2024-09-12 08:25:26 -07:00 |
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Byron Lathi
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812cb6447a
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Add mii clocks to constraints
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2024-09-09 23:18:56 -07:00 |
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Byron Lathi
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8be97b45ae
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Move to 4 TCP units for synthesis
Otherwise it does not fit in the T20
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2024-09-09 22:59:59 -07:00 |
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Byron Lathi
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4612acbc4a
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Synthesis 1
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2024-09-09 22:02:39 -07:00 |
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Byron Lathi
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e1f94f455c
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Add basic acking to synacking
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2024-09-08 18:15:43 -07:00 |
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Byron Lathi
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945889e542
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Add up dest parser
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2024-09-08 14:25:00 -07:00 |
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Byron Lathi
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ef20f1477d
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Fix ip demux wrapper, send a tcp synack
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2024-09-02 23:44:47 -07:00 |
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Byron Lathi
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0c2f36a2ff
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Send ARP response, not request
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2024-09-02 22:39:57 -07:00 |
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Byron Lathi
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87baa932f8
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Clean up
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2024-09-02 22:39:44 -07:00 |
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Byron Lathi
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efeca55a6c
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Send basic header
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2024-09-02 21:20:48 -07:00 |
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Byron Lathi
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3c5cabd2be
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Update test, use scapy
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2024-09-02 20:34:09 -07:00 |
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Byron Lathi
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30c7ed9c6a
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Start work on tx ctrl
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2024-09-02 20:33:50 -07:00 |
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Byron Lathi
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f4ab7b456d
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Update so I can switch computers
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2024-09-02 18:15:19 -07:00 |
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Byron Lathi
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1deceddcf6
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update reg addr width, add fifo for m2s dma to write to
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2024-09-02 14:48:57 -07:00 |
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Byron Lathi
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66855b050b
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Move m2s dma into the tcp streams
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2024-09-02 12:55:36 -07:00 |
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Byron Lathi
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73455e2be4
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Remove sub from verilog-ethernet
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2024-09-01 22:25:22 -07:00 |
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Byron Lathi
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dc90c00172
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Mega commit to kick things off
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2024-09-01 22:23:21 -07:00 |
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Byron Lathi
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8425d6a96e
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Remove mux/demus from dma
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2024-08-29 18:37:04 -07:00 |
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Byron Lathi
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e440aa7bdb
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Change from ddr buffers to regular fifos
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2024-08-29 18:33:52 -07:00 |
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Byron Lathi
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6f8e976a08
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Add basic m2s code
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2024-08-20 19:01:37 -07:00 |
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Byron Lathi
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9030f4b71d
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Separate ip streams
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2024-08-20 18:57:24 -07:00 |
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Byron Lathi
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b2e56f4dca
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Clean up spacing
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2024-08-20 18:57:08 -07:00 |
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Byron Lathi
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14f92c39fb
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Add blank stubs.list
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2024-08-20 18:56:01 -07:00 |
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Byron Lathi
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759a57f0af
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Add new stream dma git repo
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2024-08-20 18:47:13 -07:00 |
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Byron Lathi
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8d5393ca6e
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Changes before work
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2024-08-20 08:27:17 -07:00 |
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Byron Lathi
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7b5fb1a682
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Pass synthesis
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2024-08-19 23:17:23 -07:00 |
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Byron Lathi
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b11be44446
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Changes for synthesis
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2024-08-19 23:09:32 -07:00 |
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Byron Lathi
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f492c5b23d
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Done for the day
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2024-08-19 22:59:12 -07:00 |
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Byron Lathi
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752fce5b2e
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Update diagrams again (5)
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2024-08-19 22:13:37 -07:00 |
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Byron Lathi
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e267fa4c37
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Update diagrams again (4)
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2024-08-19 21:42:36 -07:00 |
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Byron Lathi
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d85dc3e490
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Update diagrams again (3)
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2024-08-19 21:21:39 -07:00 |
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Byron Lathi
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b8b9852974
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Update regs
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2024-08-19 21:11:12 -07:00 |
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Byron Lathi
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47f958f5c4
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Update regs
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2024-08-19 20:27:27 -07:00 |
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Byron Lathi
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c857ffd8e5
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Update diagrams again (2)
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2024-08-19 19:12:55 -07:00 |
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Byron Lathi
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7e64ff1d6b
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Update diagrams again
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2024-08-19 19:00:54 -07:00 |
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Byron Lathi
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8c9a4f7b9e
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Update drawing again
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2024-08-19 18:41:55 -07:00 |
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Byron Lathi
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bcb5259f92
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Update network_processor docs, add arp to diagram
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2024-08-19 17:40:50 -07:00 |
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Byron Lathi
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8e87345f22
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Add verilog ethernet
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2024-08-19 17:40:16 -07:00 |
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Byron Lathi
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b521bbe5cf
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Move tcp into its own wrapper
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2024-08-18 20:08:50 -07:00 |
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Byron Lathi
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a190a2d1c5
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Update tcp with new buffer type
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2024-08-18 16:41:12 -07:00 |
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Byron Lathi
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063f219f01
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Add ntw files to project
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2024-08-18 10:13:15 -07:00 |
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Byron Lathi
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8208bd6fa5
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Use sram instead of sdram in sim, fully switch to verilator
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2024-08-18 10:04:54 -07:00 |
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Byron Lathi
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9b2a40df06
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Add tcp regs and switch to verilator
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2024-08-17 11:56:01 -07:00 |
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Byron Lathi
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52a76e3a85
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Add start of regs
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2024-08-16 08:24:14 -07:00 |
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Byron Lathi
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7ba9658560
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Update network_processor docs
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2024-08-16 07:54:10 -07:00 |
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