Byron Lathi
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b1ca451721
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Add README
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2023-11-18 17:14:51 -08:00 |
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Byron Lathi
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287d81393a
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Add LICENSE
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2023-11-19 00:48:32 +00:00 |
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Byron Lathi
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27a0fe5e69
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Merge branch '10-interrupt-controller' into 'master'
Resolve "Interrupt Controller"
Closes #10
See merge request bslathi19/super6502!39
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2023-11-17 16:00:14 +00:00 |
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Byron Lathi
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27066a7ace
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Test interrupt priority
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2023-11-16 18:54:25 -08:00 |
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Byron Lathi
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b259d7f084
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Fix edge trigger, reorganize testbench
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2023-11-16 18:28:48 -08:00 |
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Byron Lathi
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5d4bad80a2
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Fix level triggered test, add to ci
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2023-11-16 08:14:58 -08:00 |
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Byron Lathi
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e163e9461f
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Fix makefile, fix how interrupts are triggered
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2023-11-15 18:46:18 -08:00 |
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Byron Lathi
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40c54e26c0
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Demonstrate basic interrupt functionality
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2023-11-15 08:42:02 -08:00 |
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Byron Lathi
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2b248db94f
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Add skeleton of interrupt controller
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2023-11-15 08:27:29 -08:00 |
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Byron Lathi
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0fe57c6ad5
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Add beginnings of interrupt controller
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2023-10-31 23:44:09 -07:00 |
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Byron Lathi
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e3ad299edf
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Update diagram again
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2023-10-31 23:11:19 -07:00 |
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Byron Lathi
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646f34cbb6
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Second diagram
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2023-10-31 23:04:50 -07:00 |
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Byron Lathi
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ca9e792844
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Add first design
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2023-10-30 23:46:21 -07:00 |
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Byron Lathi
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ac5443c0a9
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Merge branch 'long_sim' into 'master'
Long sim
See merge request bslathi19/super6502!38
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2023-10-31 03:07:49 +00:00 |
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Byron Lathi
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e3662e703c
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Add back long string
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2023-10-30 00:04:57 -07:00 |
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Byron Lathi
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876ae08cf3
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Fix off by 1 in o65 option decoding
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2023-10-29 21:38:04 -07:00 |
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Byron Lathi
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c6bf29649a
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Add some CLCs before ADCs
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2023-10-29 19:47:15 -07:00 |
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Byron Lathi
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59a6f13eb3
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Skip the copydata in kernel setup
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2023-10-28 18:31:21 -07:00 |
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Byron Lathi
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2577ab2a9a
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Update kernel makefile, test more kernel code
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2023-10-28 13:12:41 -07:00 |
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Byron Lathi
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4104a2eeb9
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Do a more sane string print first
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2023-10-27 20:49:06 -07:00 |
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Byron Lathi
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b70b49eac8
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Up sim time
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2023-10-26 21:54:08 -07:00 |
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Byron Lathi
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cf8a5d782f
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Make kernel as part of full chip sim
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2023-10-26 21:25:26 -07:00 |
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Byron Lathi
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e3ae984177
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Upload filesystem image as well
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2023-10-26 20:40:00 -07:00 |
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Byron Lathi
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7f3696d36c
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Reduce sim time
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2023-10-26 20:11:35 -07:00 |
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Byron Lathi
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3a9c0fb73f
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run vvp unbuffered
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2023-10-25 22:47:22 -07:00 |
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Byron Lathi
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674078e08d
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Don't print buf, it takes too long
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2023-10-25 21:13:01 -07:00 |
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Byron Lathi
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6f36d2fcc4
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Fix off by 1 error
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2023-10-25 20:39:55 -07:00 |
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Byron Lathi
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6fabd23125
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Change boot2 to use new offsets as well
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2023-10-25 18:56:15 -07:00 |
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Byron Lathi
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b6e3b79bda
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Change bootloader to actually use sectors per cluster
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2023-10-25 08:34:28 -07:00 |
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Byron Lathi
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e7e1eab4a4
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Try long test
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2023-10-23 18:54:51 -07:00 |
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Byron Lathi
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b7945f0dbf
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Merge branch '45-use-updated-sd-card-emulator' into 'master'
Resolve "Use updated sd card emulator"
Closes #45
See merge request bslathi19/super6502!37
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2023-10-23 00:11:34 +00:00 |
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Byron Lathi
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9d26265bb5
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Update to use new binary sd card image
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2023-10-22 16:45:41 -07:00 |
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Byron Lathi
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0c3821765a
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Merge branch '42-implement-memory-mapper' into 'master'
Resolve "Implement Memory Mapper"
Closes #42
See merge request bslathi19/super6502!36
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2023-10-22 21:06:37 +00:00 |
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Byron Lathi
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eb8ef5ba7a
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Reuse existing harness instead of copying
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2023-10-21 22:35:57 -07:00 |
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Byron Lathi
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5f863c9857
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Add code testbench
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2023-10-21 17:07:43 -07:00 |
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Byron Lathi
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4b415ed2ba
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Update C test to actually use mapper a little bit
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2023-10-20 17:20:11 -07:00 |
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Byron Lathi
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ac5564d03d
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Add test program for mapper, fix reset bug
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2023-10-20 08:27:51 -07:00 |
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Byron Lathi
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5a8d15de94
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Refactor for FPGA synthesis
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2023-10-19 18:57:42 -07:00 |
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Byron Lathi
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03456607c9
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Route all addresses through mapper
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2023-10-19 18:34:39 -07:00 |
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Byron Lathi
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69e443d223
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Add mapped address output and test
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2023-10-18 08:54:23 -07:00 |
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Byron Lathi
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35d4ea968e
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Update testbench, fix off by 1
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2023-10-18 08:40:00 -07:00 |
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Byron Lathi
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e621d4047b
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Add mapper and testbench
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2023-10-16 23:45:33 -07:00 |
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Byron Lathi
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0c6f9f4568
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Finish block diagram
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2023-10-16 22:15:54 -07:00 |
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Byron Lathi
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1ca4d6f440
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Add Docs
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2023-10-16 21:43:29 -07:00 |
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Byron Lathi
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361f48d326
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Merge branch '41-remove-addr-decode-and-properly-rename-clk_2-in-fpga' into 'master'
Revert super6502 back to before mapper
Closes #41
See merge request bslathi19/super6502!35
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2023-10-16 05:07:40 +00:00 |
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Byron Lathi
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360eecf3ca
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Revert super6502 back to before mapper
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2023-10-15 21:48:03 -07:00 |
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Byron Lathi
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0f8241f30f
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Merge branch '41-remove-addr-decode-and-properly-rename-clk_2-in-fpga' into 'master'
Resolve "Remove addr decode and properly rename clk_2 in fpga"
Closes #41
See merge request bslathi19/super6502!34
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2023-10-16 04:46:14 +00:00 |
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Byron Lathi
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b179997da8
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Remove docs (not for this merge)
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2023-10-15 21:28:02 -07:00 |
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Byron Lathi
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a7b7f4fe35
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Update build
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2023-10-15 21:27:11 -07:00 |
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Byron Lathi
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dc2154e2c2
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Fix fpga project config
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2023-10-15 21:07:15 -07:00 |
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