bslathi19
  • Joined on 2025-11-07
bslathi19 commented on issue bslathi19/alibaba_pcie#1 2025-11-09 22:19:04 -08:00
PCIe DMA

However, when we try the second read we do not see a status valid for the read.

bslathi19 commented on issue bslathi19/alibaba_pcie#1 2025-11-09 22:17:44 -08:00
PCIe DMA

Here are the original read request and the write request, right after a reboot. You can see that the read request is ack'd, then the status is valid. So is the write request.

bslathi19 commented on issue bslathi19/alibaba_pcie#1 2025-11-09 18:34:30 -08:00
PCIe DMA

We added this and it seems to be working, except that if we try to run it multiple times in a row, it doesn't end up overwriting the data. We may need to test this in sim and or get a trace on it…

bslathi19 pushed to master at bslathi19/alibaba_pcie 2025-11-09 18:33:50 -08:00
ce729f9008 Print out bytes after we read them
bslathi19 pushed to master at bslathi19/alibaba_pcie 2025-11-09 17:56:18 -08:00
32d18845e5 Add pcie test
bslathi19 pushed to master at bslathi19/alibaba_pcie 2025-11-09 17:33:57 -08:00
1a33af4ddf Add some dumb test code
bslathi19 pushed to master at bslathi19/alibaba_pcie 2025-11-09 16:02:58 -08:00
abc6ea65c5 Add write dma
bslathi19 pushed to master at bslathi19/alibaba_pcie 2025-11-09 14:13:05 -08:00
50275dc581 Add basic read dma functionality and test
bslathi19 pushed to master at bslathi19/fpga-sim 2025-11-09 14:10:25 -08:00
6cfa6ba36a Bump verison
bslathi19 pushed to master at bslathi19/fpga-sim 2025-11-09 14:09:58 -08:00
7e8e15932a Merge pull request 'dev/trace_fst' (#1) from dev/trace_fst into master
2d3d02eee9 Try 2
de3205bda7 Trace FST
Compare 3 commits »
bslathi19 merged pull request bslathi19/fpga-sim#1 2025-11-09 14:09:57 -08:00
dev/trace_fst
bslathi19 created pull request bslathi19/fpga-sim#1 2025-11-09 14:09:45 -08:00
dev/trace_fst
bslathi19 pushed to dev/trace_fst at bslathi19/fpga-sim 2025-11-09 14:00:55 -08:00
2d3d02eee9 Try 2
bslathi19 pushed to dev/trace_fst at bslathi19/fpga-sim 2025-11-09 13:45:04 -08:00
de3205bda7 Trace FST
bslathi19 created branch dev/trace_fst in bslathi19/fpga-sim 2025-11-09 13:43:00 -08:00
bslathi19 pushed to dev/trace_fst at bslathi19/fpga-sim 2025-11-09 13:43:00 -08:00
06975ff37f Trace FST
bslathi19 commented on issue bslathi19/alibaba_pcie#1 2025-11-09 00:12:41 -08:00
PCIe DMA

For simplicity, read and write will have their own sections.

bslathi19 commented on issue bslathi19/alibaba_pcie#1 2025-11-09 00:04:36 -08:00
PCIe DMA

So the only fields we really need to do are the source and destination addresses, and the length. We can autogenerate the tag based on just a counter of packets. When we write to a certain…

bslathi19 opened issue bslathi19/alibaba_pcie#1 2025-11-09 00:03:10 -08:00
PCIe DMA
bslathi19 pushed to master at bslathi19/alibaba_pcie 2025-11-08 22:06:36 -08:00
5c4d228194 Start work on DMA thing