Commit Graph

168 Commits

Author SHA1 Message Date
Alex Mykyta
840b54c6e1 Use explicit logic type for user enum declarations. #91 2024-03-29 21:22:34 -07:00
Alex Mykyta
653d4efc73 version 2024-03-20 20:02:40 -07:00
Alex Mykyta
555efdfcc0 Remove use of in-scope initial assignments to automatics to work around bug in Spyglass lint tool. #87 2024-03-20 19:57:50 -07:00
Aylon Chaim Porat
cf2be63c20 read_buffering & write_buffering: get_trigger's accesswidth and regwidth should be taken from trigger when trigger is of RegNode type, not from node 2024-03-20 19:15:33 -07:00
motchy
be8d84bba0 fix: a typo in SV template 2024-03-10 11:46:28 -07:00
Alex Mykyta
0d39774d22 Fixup whitespace 2024-01-05 21:12:25 -08:00
Alex Mykyta
6a550abc69 Fix accidental blocking assignment in always_ff for read buffering storage elements 2024-01-05 19:57:47 -08:00
Alex Mykyta
6433cd1fc8 Fix typo in pyproject keywords 2023-11-07 20:57:49 -08:00
Alex Mykyta
45999555cf Update to use trusted deploy 2023-10-28 21:25:58 -07:00
Alex Mykyta
2fedef64aa Add validation check for write buffered registers that trigger off of their own field. #39 2023-10-25 21:54:01 -07:00
Alex Mykyta
f2cb2425b3 Migrate to pyproject.toml 2023-10-24 23:03:39 -07:00
Alex Mykyta
62518b318b Implement new SVInt object to defer literal expansion and allow bit-fiddling operations. Fix invalid bit-slicing of literals if field reset value is a constant. #71 2023-10-24 22:50:41 -07:00
Alex Mykyta
b5b1ba790e Simulator compatibility updates 2023-10-22 20:43:34 -07:00
Alex Mykyta
d689bb7077 Reorganize how tb infrstructure selects toolchains 2023-10-22 11:04:43 -07:00
Alex Mykyta
683fc4d0ac Update version 2023-10-11 22:04:34 -07:00
Alex Mykyta
1488b2c0ff Add missing doc req 2023-10-11 22:00:22 -07:00
Alex Mykyta
0da6efe85c Fix hwif type name generation to properly handle parameterized component names. #70 2023-10-11 21:58:10 -07:00
Alex Mykyta
c0e341579c fix typo 2023-09-29 05:55:54 -07:00
Alex Mykyta
4fad6546fd docs yaml 2023-09-28 23:21:11 -07:00
Alex Mykyta
333853b925 Fix axi4-lite write strobe width. #68 2023-09-28 21:18:11 -07:00
Alex Mykyta
639cafc28b Fix always_ff generation for non-reset fields and async default reset. #63 2023-09-07 23:36:47 -07:00
Alex Mykyta
7bb6c0c41a Fix xsim compatibility quirk 2023-09-07 23:16:58 -07:00
Alex Mykyta
ad7b09a2f5 Remove implication operator to avoid xsim compatibility limitation. #57 2023-09-07 22:42:42 -07:00
Alex Mykyta
49db496ac1 Add parameters for data and addr width to package output 2023-08-24 20:44:16 -07:00
Alex Mykyta
280c3aad17 Discard LSbs of address for AXI4-Lite CPUIF to properly handle unaligned transfers. #60 2023-08-24 20:36:28 -07:00
Alex Mykyta
eef8f7cdb4 Doc updates 2023-08-03 22:53:22 -07:00
Alex Mykyta
5c3dd6e6bb More test coverage 2023-08-03 22:18:55 -07:00
Alex Mykyta
f9e0d1babc Coverage improvements 2023-08-02 22:28:42 -07:00
Alex Mykyta
941871007b Omit unecessary hwif signals if an external register is read-only or write-only. #58 2023-08-02 21:38:06 -07:00
Alex Mykyta
8a6f525ee2 Add assertion for rogue external ack strobes. Clarify recommended external ack tieoff. #57 2023-08-01 20:40:14 -07:00
Alex Mykyta
45eb47cdb1 Add changelog 2023-07-19 21:09:20 -07:00
Alex Mykyta
f884b91852 version 2023-07-19 21:02:10 -07:00
Alex Mykyta
211224116e Clean up ugly unconditional 'if(1)' conditionals in field logic. #50 2023-07-19 20:49:38 -07:00
Alex Mykyta
da8ff4aaeb Make remaining interrupt conditional predicates single-bit. #54 2023-07-19 20:17:46 -07:00
Alex Mykyta
18f8f358b2 Make stickybit conditional predicate a single-bit result rather than a vector. #54 2023-07-18 21:50:51 -07:00
Alex Mykyta
df5436f765 Add max range to compiler dependency 2023-07-18 21:41:29 -07:00
Alex Mykyta
60513b9730 version 2023-06-28 22:28:06 -07:00
Alex Mykyta
1f193e87eb Fix edge case if exporting a block that contains no internal registers. #53 2023-06-28 22:24:10 -07:00
Alex Mykyta
b056a443f1 Use sized integer literals in comparisons. #49 2023-06-14 21:58:41 -07:00
Alex Mykyta
ac3f466fb2 Fix oversized address width calculation edge case. #46 2023-06-12 22:05:03 -07:00
Alex Mykyta
b107be53bb version 2023-06-08 22:56:46 -07:00
Alex Mykyta
50d8779283 Use sized integer literals if bit width exceeds 32-bits. #43 2023-06-08 22:55:20 -07:00
Alex Mykyta
f36d7614c8 version 2023-05-17 19:32:24 -07:00
Alex Mykyta
0d82154b9d Add support for field paritycheck. #35 2023-05-15 22:53:17 -07:00
Alex Mykyta
3e691cb5fb Fix bug where small designs with 3 or less sw readable addresses and readback retiming enabled generate incorrect output. 2023-05-14 22:46:23 -07:00
Alex Mykyta
b8516a19c3 prerelease version 2023-05-14 17:53:36 -07:00
Alex Mykyta
fadb8ce19d Add Intel Avalon MM cpuif. #40 2023-05-14 17:00:55 -07:00
Alex Mykyta
b350da3e7c Add ability to control default reset style. #34 2023-05-13 17:15:31 -07:00
Alex Mykyta
5e76956618 Refactor exporter class to clean up the mess of random variables 2023-05-12 23:44:09 -07:00
Alex Mykyta
5b3cdd9d7a Move get_always_ff_event() to a more sensible location 2023-05-12 21:51:42 -07:00