Alex Forencich
|
2e05b1eff2
|
eth: Fix RX byte statistics strobe on AXIS GMII RX module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:31:50 -07:00 |
|
Alex Forencich
|
b073fc8efb
|
eth: Check stats outputs in AXI stream GMII TX module testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:25:53 -07:00 |
|
Alex Forencich
|
bc023296f4
|
eth: Do not count SFD as payload data
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:25:39 -07:00 |
|
Alex Forencich
|
0ef0bb3409
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_gmii_rx
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-06 00:17:31 -07:00 |
|
Alex Forencich
|
5582eddfa8
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_gmii_tx
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-05 22:15:39 -07:00 |
|
Alex Forencich
|
4f45ac950d
|
example/ZCU106: Add FMC pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:57:02 -07:00 |
|
Alex Forencich
|
04c62961aa
|
example/ZCU102: Add FMC pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:56:53 -07:00 |
|
Alex Forencich
|
7a53e8f33c
|
example/ZCU106: Clean up BASE-X core instances
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:55:59 -07:00 |
|
Alex Forencich
|
0a2e6dd573
|
example/ZCU102: Clean up BASE-X core instances
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:55:43 -07:00 |
|
Alex Forencich
|
a56939313a
|
example/ZCU102: Fix IOSTANDARD settings for UART pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 16:46:47 -07:00 |
|
Alex Forencich
|
df87998a1b
|
eth: Clean up error detection logic in combined MAC/PCS
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-27 09:33:56 -07:00 |
|
Alex Forencich
|
5b16933210
|
eth: Test more lengths to shift alignment
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 23:13:13 -07:00 |
|
Alex Forencich
|
bec324dc03
|
eth: Fix bugs in 10G MAC RX related to short IFGs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 23:03:57 -07:00 |
|
Alex Forencich
|
75a3909c37
|
eth: Add default IFG setting to Ethernet MAC TX modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 20:13:47 -07:00 |
|
Alex Forencich
|
b0bdf8ee17
|
Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 00:13:12 -07:00 |
|
Alex Forencich
|
c4fe84c9ff
|
Update readthedocs config
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-25 23:58:46 -07:00 |
|
Alex Forencich
|
8ecb68ae01
|
Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-25 00:04:54 -07:00 |
|
Alex Forencich
|
4f830c8a12
|
axi: Remove extraneous interface declarations
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-25 00:03:42 -07:00 |
|
Alex Forencich
|
d2b0fa4693
|
stats: Add statistics counter module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-25 00:02:58 -07:00 |
|
Alex Forencich
|
fd3e23ef6e
|
stats: Add statistics collector module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-24 23:22:04 -07:00 |
|
Alex Forencich
|
ee4d0da13e
|
example/VCU118: Clarify MDIO prescaler setting
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-24 00:04:36 -07:00 |
|
Alex Forencich
|
c7cf9cc1bf
|
example: Clean up and annotate USB UART connections
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-20 17:32:31 -07:00 |
|
Alex Forencich
|
315a4715ff
|
xfcp: Fix localparam definition
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 16:32:17 -07:00 |
|
Alex Forencich
|
2fd346269f
|
xfcp: Add XFCP I2C master module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 15:56:39 -07:00 |
|
Alex Forencich
|
b8021192e3
|
lss: Clean up I2C testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 14:52:26 -07:00 |
|
Alex Forencich
|
79e0bf6976
|
lss: Remove redundant tristate control outputs on I2C modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 12:41:39 -07:00 |
|
Alex Forencich
|
fa2385aedb
|
lss: Add I2C single register module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 12:15:47 -07:00 |
|
Alex Forencich
|
44c811f82a
|
lss: Add I2C master module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 10:41:16 -07:00 |
|
Alex Forencich
|
1e3e298d9e
|
Add cocotbext-i2c to tox.ini
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 10:18:03 -07:00 |
|
Alex Forencich
|
a86f858116
|
docs: Add readthedocs yaml file
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-18 16:23:30 -07:00 |
|
Alex Forencich
|
115bacae02
|
docs: Add sphinx infrastructure
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-18 16:12:49 -07:00 |
|
Alex Forencich
|
3624976f0e
|
hip: Add support for optional phase shifter clock to fractional MMCM module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-17 21:05:49 -07:00 |
|
Alex Forencich
|
d7e29a2b5c
|
hip: Add support for optional cascaded MMCM for offset clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-17 21:04:52 -07:00 |
|
Alex Forencich
|
b468d92e39
|
hip: Report error if fractional MMCM configuration does not work
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-17 21:00:12 -07:00 |
|
Alex Forencich
|
eacae099bf
|
hip: Add fractional MMCM wrapper for generating offset clocks for DDMTD
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-13 21:00:09 -07:00 |
|
Alex Forencich
|
ebeadee172
|
lss: Implement fractional baud rate generation for UART
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-11 23:49:39 -07:00 |
|
Alex Forencich
|
1c686391ab
|
lss: Refactor UART module to split out and share baud rate generation logic
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-11 23:09:19 -07:00 |
|
Alex Forencich
|
7df14e54e5
|
xfcp: Rename signals based on upstream/downstsream port role and data direction to simplify connections
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-11 18:33:57 -07:00 |
|
Alex Forencich
|
8d4ad59727
|
Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-10 17:04:03 -07:00 |
|
Alex Forencich
|
15653923fd
|
xfcp: Add XFCP switch module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-10 15:30:59 -07:00 |
|
Alex Forencich
|
0ee729b744
|
xfcp: Add XFCP AXI module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-10 13:28:05 -07:00 |
|
Alex Forencich
|
70d77c8a95
|
xfcp: Add XFCP AXI lite module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-10 13:25:55 -07:00 |
|
Alex Forencich
|
ed9e8ffab3
|
eth: Use unpacked arrays for multidimensional ports
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-07 11:05:58 -08:00 |
|
Alex Forencich
|
6e4988f010
|
eth: Fix PFC/LFC tests for 10G MAC+PHY
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-07 10:41:49 -08:00 |
|
Alex Forencich
|
cb04b84e18
|
example/VCU118: Add example design for VCU118
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-07 00:29:17 -08:00 |
|
Alex Forencich
|
024353c68a
|
lss: Add MDIO master
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 23:48:57 -08:00 |
|
Alex Forencich
|
ed325acb1e
|
axis: Implement tstrb in pipeline FIFO
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:18:20 -08:00 |
|
Alex Forencich
|
e9ac4947ba
|
axis: Normalize unpacked dimension
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:17:05 -08:00 |
|
Alex Forencich
|
56215865da
|
axi: Normalize unpacked dimension
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:16:29 -08:00 |
|
Alex Forencich
|
c422297666
|
axis: Tie off unused sideband signals in COBS encoder
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:11:38 -08:00 |
|