Byron Lathi
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674078e08d
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Don't print buf, it takes too long
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2023-10-25 21:13:01 -07:00 |
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Byron Lathi
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6f36d2fcc4
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Fix off by 1 error
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2023-10-25 20:39:55 -07:00 |
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Byron Lathi
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6fabd23125
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Change boot2 to use new offsets as well
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2023-10-25 18:56:15 -07:00 |
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Byron Lathi
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b6e3b79bda
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Change bootloader to actually use sectors per cluster
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2023-10-25 08:34:28 -07:00 |
|
Byron Lathi
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e7e1eab4a4
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Try long test
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2023-10-23 18:54:51 -07:00 |
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Byron Lathi
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b7945f0dbf
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Merge branch '45-use-updated-sd-card-emulator' into 'master'
Resolve "Use updated sd card emulator"
Closes #45
See merge request bslathi19/super6502!37
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2023-10-23 00:11:34 +00:00 |
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Byron Lathi
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9d26265bb5
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Update to use new binary sd card image
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2023-10-22 16:45:41 -07:00 |
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Byron Lathi
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0c3821765a
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Merge branch '42-implement-memory-mapper' into 'master'
Resolve "Implement Memory Mapper"
Closes #42
See merge request bslathi19/super6502!36
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2023-10-22 21:06:37 +00:00 |
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Byron Lathi
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eb8ef5ba7a
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Reuse existing harness instead of copying
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2023-10-21 22:35:57 -07:00 |
|
Byron Lathi
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5f863c9857
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Add code testbench
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2023-10-21 17:07:43 -07:00 |
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Byron Lathi
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4b415ed2ba
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Update C test to actually use mapper a little bit
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2023-10-20 17:20:11 -07:00 |
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Byron Lathi
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ac5564d03d
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Add test program for mapper, fix reset bug
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2023-10-20 08:27:51 -07:00 |
|
Byron Lathi
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5a8d15de94
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Refactor for FPGA synthesis
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2023-10-19 18:57:42 -07:00 |
|
Byron Lathi
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03456607c9
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Route all addresses through mapper
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2023-10-19 18:34:39 -07:00 |
|
Byron Lathi
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69e443d223
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Add mapped address output and test
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2023-10-18 08:54:23 -07:00 |
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Byron Lathi
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35d4ea968e
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Update testbench, fix off by 1
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2023-10-18 08:40:00 -07:00 |
|
Byron Lathi
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e621d4047b
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Add mapper and testbench
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2023-10-16 23:45:33 -07:00 |
|
Byron Lathi
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0c6f9f4568
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Finish block diagram
|
2023-10-16 22:15:54 -07:00 |
|
Byron Lathi
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1ca4d6f440
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Add Docs
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2023-10-16 21:43:29 -07:00 |
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Byron Lathi
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361f48d326
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Merge branch '41-remove-addr-decode-and-properly-rename-clk_2-in-fpga' into 'master'
Revert super6502 back to before mapper
Closes #41
See merge request bslathi19/super6502!35
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2023-10-16 05:07:40 +00:00 |
|
Byron Lathi
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360eecf3ca
|
Revert super6502 back to before mapper
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2023-10-15 21:48:03 -07:00 |
|
Byron Lathi
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0f8241f30f
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Merge branch '41-remove-addr-decode-and-properly-rename-clk_2-in-fpga' into 'master'
Resolve "Remove addr decode and properly rename clk_2 in fpga"
Closes #41
See merge request bslathi19/super6502!34
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2023-10-16 04:46:14 +00:00 |
|
Byron Lathi
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b179997da8
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Remove docs (not for this merge)
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2023-10-15 21:28:02 -07:00 |
|
Byron Lathi
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a7b7f4fe35
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Update build
|
2023-10-15 21:27:11 -07:00 |
|
Byron Lathi
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dc2154e2c2
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Fix fpga project config
|
2023-10-15 21:07:15 -07:00 |
|
Byron Lathi
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155e89240a
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Merge from master
|
2023-10-15 18:58:25 -07:00 |
|
Byron Lathi
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fd4dbfaf81
|
Merge branch '38-increase-cpu-speed' into 'master'
Resolve "Increase CPU Speed"
Closes #38
See merge request bslathi19/super6502!33
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2023-10-16 01:45:44 +00:00 |
|
Byron Lathi
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e768b245bd
|
rework state machine
|
2023-10-15 18:24:19 -07:00 |
|
Byron Lathi
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362c9f140f
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Fix synthesis issue
|
2023-10-15 13:52:55 -07:00 |
|
Byron Lathi
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e0e20d7fb4
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Add indirect test
|
2023-10-15 13:41:51 -07:00 |
|
Byron Lathi
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32f6c0f8d9
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Add jsr test
|
2023-10-15 13:30:09 -07:00 |
|
Byron Lathi
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afd8de92cc
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Fix sdram wrapper state machine
|
2023-10-15 13:12:46 -07:00 |
|
Byron Lathi
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673386f9f9
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Change clk_2 to clk_cpu
|
2023-10-12 19:32:12 -07:00 |
|
Byron Lathi
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893a0f1a9e
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Merge branch '37-run-full-boot-simulation-as-part-of-ci' into 'master'
Resolve "Run full boot simulation as part of CI"
Closes #37
See merge request bslathi19/super6502!32
|
2023-10-11 08:43:33 +00:00 |
|
Byron Lathi
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448d9add89
|
Use repo based path for creating fs image
|
2023-10-11 01:06:50 -07:00 |
|
Byron Lathi
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4988d458b7
|
full sim requires toolchain
|
2023-10-11 01:02:41 -07:00 |
|
Byron Lathi
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d3ea5ed4d1
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Use udisksctl
|
2023-10-11 00:59:41 -07:00 |
|
Byron Lathi
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3900093349
|
Merge branch '34-sd-card-spi-mode-testbench' into 'master'
Resolve "SD Card SPI mode testbench"
Closes #34
See merge request bslathi19/super6502!29
|
2023-10-11 05:15:25 +00:00 |
|
Byron Lathi
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8e70e5a7c4
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Update verilog sd
|
2023-10-10 21:40:24 -07:00 |
|
Byron Lathi
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57efb41ae0
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Increase sim time, update verilog sd
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2023-10-10 21:39:10 -07:00 |
|
Byron Lathi
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97622ac3bb
|
Update verilog sd
|
2023-10-09 23:32:55 -07:00 |
|
Byron Lathi
|
7bb2dd9a7f
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Update verilog sd
|
2023-10-09 22:33:44 -07:00 |
|
Byron Lathi
|
67fa368319
|
Update verilog sd
|
2023-10-09 21:13:21 -07:00 |
|
Byron Lathi
|
fc13114e49
|
Update verilog sd
|
2023-10-09 21:07:36 -07:00 |
|
Byron Lathi
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532364b8d2
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remove sd from regular sim
Figure out how to do this later
|
2023-10-06 22:08:40 -07:00 |
|
Byron Lathi
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fe72a4e9ea
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Remove dependency on file, since its created anyway
|
2023-10-06 13:21:54 -07:00 |
|
Byron Lathi
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d27e442d5e
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Use REPO_TOP in script, call script from makefile
|
2023-10-06 13:18:36 -07:00 |
|
Byron Lathi
|
a5ff9fb5da
|
Update verilog sd
|
2023-10-06 12:46:29 -07:00 |
|
Byron Lathi
|
a3e0ab0e1e
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Use 8 bit memory !! Will eat all your RAM!
Figure out a better way to load memories that doesn't immediately oom
you.
|
2023-10-06 07:28:34 -07:00 |
|
Byron Lathi
|
2084054d3d
|
Add script for creating verilog filesystem image
|
2023-10-06 06:48:47 -07:00 |
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