Byron Lathi
028a431189
readres2 and readbytes assembly rewrite
2023-07-23 18:00:22 -07:00
Byron Lathi
2ef463846f
Consolidate another res1 function
2023-07-23 17:30:05 -07:00
Byron Lathi
60072603d9
Rewrite readRes1, consolidate res1 commands
2023-07-23 17:26:40 -07:00
Byron Lathi
709c60cf36
SD_command assembly rewrite
2023-07-23 16:25:13 -07:00
Byron Lathi
5ca5fca29b
Get SD card working in SPI
2023-07-23 14:55:14 -07:00
Byron Lathi
6a1a76db35
Implement basic SPI controller
2023-07-21 23:01:37 -07:00
Byron Lathi
85f12c75f1
Start spi controller and tb
2023-07-21 22:10:39 -07:00
Byron Lathi
6706cc502e
Update software to match efinix hw
2023-07-19 21:07:17 -07:00
Byron Lathi
6eeecda368
Add wait states during refresh
2023-07-19 21:06:54 -07:00
Byron Lathi
21e3a477c1
Update IP
2023-07-19 21:06:20 -07:00
Byron Lathi
2f11808f11
Change to simpler rom
2023-01-13 13:07:13 -06:00
Byron Lathi
7682dffe3c
Change test program to use correct args
...
Seems to work, when you run the test program it resets the card and
sends the voltage and test pattern, and it does receive a response from
the card.
2023-01-12 21:45:13 -06:00
Byron Lathi
98c07b59b4
Add files from previous version
2023-01-12 17:06:25 -06:00
Byron Lathi
3ff6205e93
Add weak pull up (NEED STRONGER PULLUP)
...
weak pullup is enabled, but these are only about 40k when 10k is needed.
I added two 10k resistors to the board.
2023-01-12 17:05:06 -06:00
Byron Lathi
519cd19739
Add uart2 test program
...
Reads input from uart and then writes it back out again immediately.
2023-01-12 14:05:13 -06:00
Byron Lathi
d5bccd46e3
Add write flag and reset logic for read flag
2023-01-12 14:04:44 -06:00
Byron Lathi
ab46236816
First throw at UART.
2023-01-12 13:34:46 -06:00
Byron Lathi
7e97784992
Create UART and uart_wrapper
2023-01-11 21:16:16 -05:00
Byron Lathi
2f37965464
Add labels for sd mode
2023-01-10 16:58:08 -06:00
Byron Lathi
b5fc0587ac
Add labels on fpga side
2023-01-10 16:55:14 -06:00
Byron Lathi
2eaf1d948c
Add text labels to arduino pins
...
I finally found the schematics for the 385 board so now there can be
labels for what the pins actually do.
2023-01-10 16:42:44 -06:00
Byron Lathi
4f8e63f463
Update sdram controller with new Efinity version
...
For some reason the old one did not want to open in the new version.
Even though the version of the IP is the same, something about it being
made with the old Efinity version made it mad.
I just deleted it and made it again with the same settings and now it
lets me open and configure it.
2023-01-06 10:28:08 -05:00
Byron Lathi
8181a3a583
Change divider to pipelined version
...
The pipelining allows the cpu to run at a faster clock speed but results
in latency. At the current 2 MHz, there is 1 cycle of latency which is
negligible because the 6502 cannot do sequential data memory accesses.
In the future, there will have to be some sort of status flag or
interrupt showing that the divider is ready.
2023-01-05 19:21:00 -05:00
Byron Lathi
5f6657a227
Add divider
...
Adds a 16x16 divider to go with the multiplier.
The divider is a single stage with no pipelining, which works at the
slow 2MHz frequency. Doing this lowers the maximum clock frequency to 5.
This is acceptable for now but means that the cpu can't be run at 14,
which is the maximum frequency.
2023-01-05 18:35:42 -05:00
Byron Lathi
42ad901ba4
Add multiplier
...
Add 16x16 multiplier.
Pretty simple. Address 0-1 is multipled by address 2-3 and the result is
in address 4-7, all little endian of course.
2023-01-04 16:15:02 -05:00
Byron Lathi
32a78a4aff
Add interrupt based timer and test code
2023-01-03 18:20:34 -05:00
Byron Lathi
1ac3bdf614
update timer
...
change how timer works, now counter and timer are not separate.
2023-01-03 15:49:56 -05:00
Byron Lathi
9a2f0a4bb4
Create interrupt controller
2023-01-03 14:50:45 -05:00
Byron Lathi
7bb30abaab
Remove unused files
2023-01-03 13:35:10 -05:00
Byron Lathi
d9da0d2bf5
Create 385 IO shield adapter
2023-01-03 13:29:51 -05:00
Byron Lathi
ee8cf1fc37
Make adapter for 385 board
2022-12-30 17:42:11 -05:00
Byron Lathi
ca099a5ef2
Finish routing sd card slot, update gitignore
2022-12-30 15:37:14 -05:00
Byron Lathi
8c4102612f
Add timer and test program
2022-12-29 11:51:38 -05:00
Byron Lathi
642dfcbeb1
change to asynchronous read
2022-12-29 11:51:07 -05:00
Byron Lathi
34afd3875c
Add timer and testbench
2022-12-29 11:14:32 -05:00
Byron Lathi
91833e1f4f
Test the runram program
2022-12-23 14:35:45 -05:00
Byron Lathi
33e33231a7
Add test programs
2022-12-23 14:20:44 -05:00
Byron Lathi
9947fbdfe2
Start work on simpler board
2022-12-23 10:34:47 -05:00
Byron Lathi
6361f39e0b
Add back in DM signals for proper byte accesses
2022-12-22 23:26:01 -05:00
Byron Lathi
e08e839d01
New test program
2022-12-22 22:39:43 -05:00
Byron Lathi
cf9aef64ac
First stab at getting sdram working
2022-12-22 20:25:32 -05:00
Byron Lathi
772f8ff13f
Update gitignore
2022-12-21 20:49:27 -05:00
Byron Lathi
df80fe0803
throw some stuff on.
...
This will have to be changed, some things like the VGA connector will
not work because they will interfere with the cpu adapter.
It may be worth thinking about making these smaller and not including
the ethernet for example, since that will not come for a while.
The only things we really need to start are the SD card and serial port.
2022-12-21 19:13:00 -05:00
Byron Lathi
b8161e3082
Add LED module and address decoding; disable LA
...
The Logic analyzer isn't that useful anyway since it does not track
rising and falling edges.
2022-12-20 19:26:24 -05:00
Byron Lathi
aefa3d23f3
remove dangling comma
2022-12-20 17:33:58 -05:00
Byron Lathi
366c6c9b6e
Remove gitlab ci
2022-12-20 17:29:15 -05:00
Byron Lathi
12fb6283cc
Get block rom working
2022-12-20 17:26:59 -05:00
Byron Lathi
52de8d3eb3
Get block rom kind of working
2022-12-20 15:38:55 -05:00
Byron Lathi
19b13164e9
RWB and ADDR are inputs, not outputs!
2022-12-19 23:43:45 -05:00
Byron Lathi
507d783a0c
remove lock
2022-12-19 23:15:12 -05:00
