Alex Forencich
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a790e270b8
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axi: Replace reg with logic in AXI lite RAM
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 13:44:18 -08:00 |
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Alex Forencich
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ad3042e090
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axi: Add AXI lite dual-port RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 00:58:30 -08:00 |
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Alex Forencich
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55c097f47d
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axi: Add AXI RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 00:27:11 -08:00 |
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Alex Forencich
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0632b1982e
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axi: Add AXI lite RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 00:26:03 -08:00 |
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Alex Forencich
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ae26b61200
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axi: Add AXI register module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-26 21:08:39 -08:00 |
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Alex Forencich
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1075896ecc
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axi: Add AXI lite register module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-26 21:02:50 -08:00 |
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Alex Forencich
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5e5bce9aa0
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axi: Add SV interface for AXI
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-26 20:51:25 -08:00 |
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Alex Forencich
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5f9f71e615
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axi: Add SV interface for AXI lite
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-26 20:51:16 -08:00 |
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