Ok that is one in dc339cb725af758c7bc9838d4920e9d921d31a55
Now for regular indirect. We can just copy JMPI0 twice.
Lets tackle absolute,x indirect.
This is states JMPIXn
Like absx, We can probably just copy this state twice https://git.byronlathi.com/bslathi19/verilog6502/src/commit/06f933fa56fb4a83ef458…
abs,x next.
Looks like we can just copy this state https://git.byronlathi.com/bslathi19/verilog6502/src/branch/master/src/cpu_65c02.v#L215 2 more times
Lets tackle absolute for normal instructions next.
747438a9b678417f56eb94c90a31c456f70056b5
This was pretty simple, we just copy the ABS0 state two more times.
The BRK changes are added in 9476c6a0dd3bec6bf7d521cdd2c3467bcd3fb929
Now that we have those, we need to update the JMP state, since it is only waiting 1 cycle for an address ![image.png](/attac…
Actually before we do that, we need to do the vectors so that we can even reset the chip. We start in state BRK0 https://git.byronlathi.com/bslathi19/verilog6502/src/commit/06f933fa56fb4a83ef4580…
second state that needs changed is ABSn
currently there are 2 states, for loading 2 bytes
06f933fa56/…
Starting from the top, the first thing that needs to change is state IND0
All IND0 does is go to INDX1, bypassing the INDX0 state where the zp address is added with the X register. This…