So we need to load 4 bytes from zeropage, which means we need to calculate 4 new addresses, but at the same time we also need to add the Y register to what we are reading. We might need to add…
Hmm that plan would not work because we need the ALU to be adding the offset, whereas this instruction also uses the ALU to generate the address.
Lets do Indirect Indexed, since it is apparently the most common indirection mode. according to the state listing, here are the steps that we do https://git.byronlathi.com/bslathi19/verilog6502/s…
Ok that is one in dc339cb725af758c7bc9838d4920e9d921d31a55
Now for regular indirect. We can just copy JMPI0 twice.
Lets tackle absolute,x indirect.
This is states JMPIXn
Like absx, We can probably just copy this state twice https://git.byronlathi.com/bslathi19/verilog6502/src/commit/06f933fa56fb4a83ef458…
abs,x next.
Looks like we can just copy this state https://git.byronlathi.com/bslathi19/verilog6502/src/branch/master/src/cpu_65c02.v#L215 2 more times
Lets tackle absolute for normal instructions next.
747438a9b678417f56eb94c90a31c456f70056b5
This was pretty simple, we just copy the ABS0 state two more times.
The BRK changes are added in 9476c6a0dd3bec6bf7d521cdd2c3467bcd3fb929
Now that we have those, we need to update the JMP state, since it is only waiting 1 cycle for an address ![image.png](/attac…