Byron Lathi
|
b70b49eac8
|
Up sim time
|
2023-10-26 21:54:08 -07:00 |
|
Byron Lathi
|
cf8a5d782f
|
Make kernel as part of full chip sim
|
2023-10-26 21:25:26 -07:00 |
|
Byron Lathi
|
e3ae984177
|
Upload filesystem image as well
|
2023-10-26 20:40:00 -07:00 |
|
Byron Lathi
|
7f3696d36c
|
Reduce sim time
|
2023-10-26 20:11:35 -07:00 |
|
Byron Lathi
|
3a9c0fb73f
|
run vvp unbuffered
|
2023-10-25 22:47:22 -07:00 |
|
Byron Lathi
|
6f36d2fcc4
|
Fix off by 1 error
|
2023-10-25 20:39:55 -07:00 |
|
Byron Lathi
|
b6e3b79bda
|
Change bootloader to actually use sectors per cluster
|
2023-10-25 08:34:28 -07:00 |
|
Byron Lathi
|
e7e1eab4a4
|
Try long test
|
2023-10-23 18:54:51 -07:00 |
|
Byron Lathi
|
9d26265bb5
|
Update to use new binary sd card image
|
2023-10-22 16:45:41 -07:00 |
|
Byron Lathi
|
eb8ef5ba7a
|
Reuse existing harness instead of copying
|
2023-10-21 22:35:57 -07:00 |
|
Byron Lathi
|
5f863c9857
|
Add code testbench
|
2023-10-21 17:07:43 -07:00 |
|
Byron Lathi
|
ac5564d03d
|
Add test program for mapper, fix reset bug
|
2023-10-20 08:27:51 -07:00 |
|
Byron Lathi
|
5a8d15de94
|
Refactor for FPGA synthesis
|
2023-10-19 18:57:42 -07:00 |
|
Byron Lathi
|
03456607c9
|
Route all addresses through mapper
|
2023-10-19 18:34:39 -07:00 |
|
Byron Lathi
|
69e443d223
|
Add mapped address output and test
|
2023-10-18 08:54:23 -07:00 |
|
Byron Lathi
|
35d4ea968e
|
Update testbench, fix off by 1
|
2023-10-18 08:40:00 -07:00 |
|
Byron Lathi
|
e621d4047b
|
Add mapper and testbench
|
2023-10-16 23:45:33 -07:00 |
|
Byron Lathi
|
360eecf3ca
|
Revert super6502 back to before mapper
|
2023-10-15 21:48:03 -07:00 |
|
Byron Lathi
|
a7b7f4fe35
|
Update build
|
2023-10-15 21:27:11 -07:00 |
|
Byron Lathi
|
dc2154e2c2
|
Fix fpga project config
|
2023-10-15 21:07:15 -07:00 |
|
Byron Lathi
|
155e89240a
|
Merge from master
|
2023-10-15 18:58:25 -07:00 |
|
Byron Lathi
|
e768b245bd
|
rework state machine
|
2023-10-15 18:24:19 -07:00 |
|
Byron Lathi
|
362c9f140f
|
Fix synthesis issue
|
2023-10-15 13:52:55 -07:00 |
|
Byron Lathi
|
32f6c0f8d9
|
Add jsr test
|
2023-10-15 13:30:09 -07:00 |
|
Byron Lathi
|
afd8de92cc
|
Fix sdram wrapper state machine
|
2023-10-15 13:12:46 -07:00 |
|
Byron Lathi
|
673386f9f9
|
Change clk_2 to clk_cpu
|
2023-10-12 19:32:12 -07:00 |
|
Byron Lathi
|
d3ea5ed4d1
|
Use udisksctl
|
2023-10-11 00:59:41 -07:00 |
|
Byron Lathi
|
8e70e5a7c4
|
Update verilog sd
|
2023-10-10 21:40:24 -07:00 |
|
Byron Lathi
|
57efb41ae0
|
Increase sim time, update verilog sd
|
2023-10-10 21:39:10 -07:00 |
|
Byron Lathi
|
97622ac3bb
|
Update verilog sd
|
2023-10-09 23:32:55 -07:00 |
|
Byron Lathi
|
7bb2dd9a7f
|
Update verilog sd
|
2023-10-09 22:33:44 -07:00 |
|
Byron Lathi
|
67fa368319
|
Update verilog sd
|
2023-10-09 21:13:21 -07:00 |
|
Byron Lathi
|
fc13114e49
|
Update verilog sd
|
2023-10-09 21:07:36 -07:00 |
|
Byron Lathi
|
532364b8d2
|
remove sd from regular sim
Figure out how to do this later
|
2023-10-06 22:08:40 -07:00 |
|
Byron Lathi
|
fe72a4e9ea
|
Remove dependency on file, since its created anyway
|
2023-10-06 13:21:54 -07:00 |
|
Byron Lathi
|
d27e442d5e
|
Use REPO_TOP in script, call script from makefile
|
2023-10-06 13:18:36 -07:00 |
|
Byron Lathi
|
a5ff9fb5da
|
Update verilog sd
|
2023-10-06 12:46:29 -07:00 |
|
Byron Lathi
|
a3e0ab0e1e
|
Use 8 bit memory !! Will eat all your RAM!
Figure out a better way to load memories that doesn't immediately oom
you.
|
2023-10-06 07:28:34 -07:00 |
|
Byron Lathi
|
2b98ad1522
|
Increase sim time to get into sd block reads
|
2023-10-04 22:50:55 -07:00 |
|
Byron Lathi
|
e6e3044f25
|
update sd emulator
|
2023-10-04 20:27:25 -07:00 |
|
Byron Lathi
|
6a684f62f8
|
Remove another wait, update sd emulator
|
2023-10-04 20:24:56 -07:00 |
|
Byron Lathi
|
019b9c8120
|
Update sd, remove wait state
|
2023-10-04 19:11:45 -07:00 |
|
Byron Lathi
|
c1f7b33dda
|
Update sd card emu
|
2023-10-03 23:08:56 -07:00 |
|
Byron Lathi
|
3a211faed7
|
Don't have sd wait in simulation
need to figure out how to set that RTL_SIM flag only when we are
compiling code for the sim
also bro the sim is like 8000x slower than irl.
|
2023-09-30 17:40:01 -07:00 |
|
Byron Lathi
|
cc32430f2a
|
Refactor makefile, update verilog-sd-emulator
|
2023-09-29 23:48:28 -07:00 |
|
Byron Lathi
|
913351efd4
|
Add sd emulator as submodule
|
2023-09-28 23:09:47 -07:00 |
|
Byron Lathi
|
62967aa88d
|
Resolve "Add build check to CI"
|
2023-09-29 05:14:52 +00:00 |
|
Byron Lathi
|
d5bb93f9c9
|
Fix the bad commit
|
2023-09-28 21:30:38 -07:00 |
|
Byron Lathi
|
d113498459
|
Try a bad commit
|
2023-09-28 21:28:39 -07:00 |
|
Byron Lathi
|
85f53816f9
|
Remove unneeded CR
|
2023-09-27 23:03:22 -07:00 |
|