Byron Lathi
28836259e2
Don't track vcd files either
2022-03-12 19:34:43 -06:00
Byron Lathi
b7c92d3117
Don't track signaltap
2022-03-12 19:30:37 -06:00
Byron Lathi
ca4288df66
Change addr_decode test to use new io locations
...
Instead of whatever was there before, the new io locations are ram, rom,
and the hex digits.
2022-03-12 19:25:34 -06:00
Byron Lathi
08af30e823
Remove C tests
...
The previous tests are not useful anymore.
2022-03-12 19:25:01 -06:00
Byron Lathi
5106e50395
Update bootstrap code
...
Was missing some things like initializing the stack pointer, clearing
BSS, and things like that
2022-03-11 22:57:22 -06:00
Byron Lathi
3d9d340520
Get the FPGA part working
...
This changes some of the clocks, fixes a bug in the seven segment stuff.
2022-03-11 22:55:26 -06:00
Byron Lathi
cdf3da9b13
Add hex drivers
2022-03-11 18:25:55 -06:00
Byron Lathi
bf28201832
Add basic hex digit code
2022-03-11 18:25:47 -06:00
Byron Lathi
58362d2ac8
Remove unused code
2022-03-11 18:24:04 -06:00
Byron Lathi
254d7b887e
Update .gitlab-ci.yml
2022-03-10 22:27:43 +00:00
Byron Lathi
5d8c4aab44
Add USB code
...
Adds the usb code that we got in ECE 385. It will not work now, and
parts that involve the timer are disabled. It does compile though, with
a few warnings.
The goal will be to add USB MSD support, which is not actually given to
us so I will have to do myself or find some other code to base it off
of.
2022-03-10 16:15:08 -06:00
Byron Lathi
aca739338a
Remove spi_word and replace with spi_deselect
...
Since the goal is to have the MAX3421E working, which uses multiple 8
bit transfers, we should support multiple 8 bit transfers instead of
trying to use 16 bit transfers.
When using spi_byte(), the device is automatically selected. After you
have made as many transfers as you want, you must deselect the device
with spi_deselect().
2022-03-10 14:43:49 -06:00
Byron Lathi
fe3851875d
Add spi_word()
2022-03-10 13:38:39 -06:00
Byron Lathi
35973473d3
Change spi_write_byte to spi_byte
...
the SPI module reads and writes at the same time. If you don't want to
write a value, then write all zeros or whatever the device you are
communicating with wants.
2022-03-10 12:14:07 -06:00
Byron Lathi
236a75eef8
Update spi.s
...
Use names instead of magic values.
2022-03-10 11:29:32 -06:00
Byron Lathi
ee5271d955
Fix spi bug
...
Was reading a value from x, shifting it, but then not writing it back.
This caused an infinite loop as it would never move on from the MSB.
2022-03-10 11:16:35 -06:00
Byron Lathi
6f3155cf35
Add sim65 tests
2022-03-10 11:06:48 -06:00
Byron Lathi
eed7c21971
Update Makefile
...
Change lists to not have trailing slash
Remove listing folder during clean
2022-03-10 10:29:34 -06:00
Byron Lathi
fff193ea0f
Add basic spi code
...
Implements the bit bang spi protocol
2022-03-10 10:26:36 -06:00
Byron Lathi
80d49b4f87
Update makefile
...
Generates listing files and a map file now.
2022-03-10 10:25:36 -06:00
Byron Lathi
3f5a653326
Rename assembly files from .S to .s
2022-03-10 10:17:37 -06:00
Byron Lathi
bac37bab55
Remove non existing import
2022-03-08 15:50:10 -06:00
Byron Lathi
2c26e82a0d
Remove io c code
2022-03-08 15:41:03 -06:00
Byron Lathi
ad55f986f5
Add bb_spi_controller
...
Bit banged spi controller, very simple but very slow.
2022-03-08 15:26:01 -06:00
Byron Lathi
e1f50e825d
Ignore gerber output files and folders
2022-03-08 15:25:05 -06:00
Byron Lathi
de320babfc
Fix ground plane not connected
2022-03-08 15:23:20 -06:00
Byron Lathi
f1f1a90eeb
Change IO_REMAP location
2022-03-05 23:23:05 -06:00
Byron Lathi
16b50dcca7
Add io chip select
2022-03-05 23:15:50 -06:00
Byron Lathi
0ad18720bb
update cc65 docker image
2022-03-05 22:58:53 -06:00
Byron Lathi
db3a150f93
Use different cc65 docker image
2022-03-05 22:39:36 -06:00
Byron Lathi
e9104e4233
Add explicit assembly targets
2022-03-05 22:34:54 -06:00
Byron Lathi
6b24abdbd5
Add io helper functions
2022-03-05 22:34:34 -06:00
Byron Lathi
859a954996
Add STARTUP info
2022-03-05 21:26:09 -06:00
Byron Lathi
048db615b9
Add basic io header
2022-03-05 21:17:33 -06:00
Byron Lathi
9c29aa4fdf
Update linker script to allow c source files
2022-03-05 21:09:46 -06:00
Byron Lathi
378b3c0cb1
run addr_decode test
2022-03-05 20:13:33 -06:00
Byron Lathi
c70272f9de
Add addr_decode and testbench
2022-03-05 20:11:47 -06:00
Byron Lathi
37e122197f
Refactor CI into one file
...
Remove the downstream stuff and consolidate the hw and sw pipelines into
one.
2022-03-05 19:22:00 -06:00
Byron Lathi
8855bedaf2
Change to directory before running quartus
2022-03-05 19:11:53 -06:00
Byron Lathi
397372d9dc
Revert "Change to using includes rather than children"
...
This reverts commit fd87d5b0ba
2022-03-06 01:09:37 +00:00
Byron Lathi
fd87d5b0ba
Change to using includes rather than children
2022-03-05 19:08:42 -06:00
Byron Lathi
a854ac4067
Fix fpga ci
...
typo
2022-03-05 19:00:49 -06:00
Byron Lathi
e29bf45ecb
Add fpga ci
2022-03-05 19:00:06 -06:00
Byron Lathi
dbf990df3b
Add ci
2022-03-05 18:57:19 -06:00
Byron Lathi
a2fdcc5553
Add software files
2022-03-05 18:48:19 -06:00
Byron Lathi
bc98b67ddf
Add boot rom
2022-03-05 18:12:27 -06:00
Byron Lathi
a096f09fc9
Remove board backups folder
2022-03-05 17:52:51 -06:00
Byron Lathi
aca17a9cf8
Create quartus project
2022-03-05 17:52:42 -06:00
Byron Lathi
b996d93c99
Create quartus project
2022-03-05 16:38:12 -06:00
Byron Lathi
d364c216b8
Create board
2022-03-05 16:25:20 -06:00