bslathi19

bslathi19 pushed to master at bslathi19/fpga-sim

2026-02-07 15:45:34 -08:00

069e87decf Revert FST, use VCD instead

bslathi19 pushed to master at bslathi19/taxi-bsl

2026-02-07 14:43:52 -08:00

2cc1743a2b Add efinix ddio primitives

bslathi19 pushed to master at bslathi19/taxi-bsl

2026-02-05 08:23:03 -08:00

284cb878ae Add efinix ddio primitives

bslathi19 pushed to master at bslathi19/taxi-peakrdl-extensions

2026-02-05 08:18:56 -08:00

c63f823f5c Add publish action

bslathi19 pushed to master at bslathi19/taxi-peakrdl-extensions

2026-02-05 08:15:40 -08:00

11b89432df Initial Commit

bslathi19 pushed to taxi_apb at bslathi19/PeakRDL-BusDecoder

2026-02-04 08:08:10 -08:00

fe47aee26b Bump version

094d38ff92 use fanin_wr and fanin_rd

b2923f4c7b fix type check error

953e36c812 Gate assertions behind "PEAKRDL_ASSERTIONS define"

951a00f66b Add taxi apb interface

Compare 6 commits »

bslathi19 pushed to blathi/taxi_apb at bslathi19/PeakRDL-regblock

2026-02-04 07:56:44 -08:00

cf30e28507 Add taxi apb

bslathi19 pushed to taxi_apb at bslathi19/PeakRDL-BusDecoder

2026-02-04 07:35:44 -08:00

7d88b26a65 use fanin_wr and fanin_rd

bslathi19 pushed to taxi_apb at bslathi19/PeakRDL-BusDecoder

2026-02-03 23:06:19 -08:00

575cd330c6 use fanin_wr and fanin_rd

bslathi19 pushed to taxi_apb at bslathi19/PeakRDL-BusDecoder

2026-02-03 22:33:19 -08:00

ceed4586cc fix type check error

bslathi19 pushed to taxi_apb at bslathi19/PeakRDL-BusDecoder

2026-02-03 22:01:47 -08:00

3f39cac8f4 Gate assertions behind "PEAKRDL_ASSERTIONS define"

fbe0f1898b Add taxi apb interface

36ec8b9715 update lock

244bd8d773 revamp docs

bad845d15e Fix/better spec enforcing (#41)

Compare 23 commits »

bslathi19 created branch master in bslathi19/creditcardle

2026-01-24 21:56:51 -08:00

bslathi19 pushed to master at bslathi19/creditcardle

2026-01-24 21:56:51 -08:00

bffc50aef0 Proof of concept

bslathi19 created repository bslathi19/creditcardle

2026-01-24 21:56:38 -08:00

bslathi19 pushed to master at bslathi19/crypto

2026-01-18 21:59:04 -08:00

9b40c88673 Whatever I was working on

bslathi19 pushed to master at bslathi19/crypto

2026-01-18 20:41:48 -08:00

d5035c6c81 Add poly1305 stage

2102cb41f4 Fix bug where top 2 bits were getting lost in the modulo

d6a062baa0 Make modular mult work

ad257f4220 Add mult, but it doesn't quite work

Compare 4 commits »

bslathi19 pushed to master at bslathi19/wireguard_fpga

2026-01-18 01:32:48 -08:00

a76a054387 Add upstream ip check

098ba2e2cd Add skeletons

Compare 2 commits »

bslathi19 synced commits to master at bslathi19/taxi from mirror 2026-01-18 01:30:36 -08:00

62da198a76 dma: Remove extraneous comma

bslathi19 pushed to master at bslathi19/wireguard_fpga

2026-01-17 23:20:00 -08:00

3d64d3d0ba Add top docs

bslathi19 pushed to master at bslathi19/wireguard_fpga

2026-01-17 22:45:57 -08:00

b40f8b02e4 add submodules