Commit Graph

  • 86c7977a42 Use relative submodule paths for ci Byron Lathi 2024-07-17 00:45:35 -07:00
  • 63edbff30f Reset renaming, set card_detect Byron Lathi 2024-07-17 00:43:30 -07:00
  • 6b7f7837dd Use ZipCPU SD controller Byron Lathi 2024-07-17 00:17:24 -07:00
  • e0bf1580b6 First pass at integrating sd controller Byron Lathi 2024-07-16 18:57:57 -07:00
  • cdbf311fc1 Move controller and make wrapper folder Byron Lathi 2024-07-16 00:28:48 -07:00
  • 4f152623a0 Remove all traces of old sd controller Byron Lathi 2024-07-16 00:03:13 -07:00
  • 08717235a8 Also load iverilog module Byron Lathi 2024-07-15 23:59:01 -07:00
  • f04304bcbc Add sd and wb2axi submodules Byron Lathi 2024-07-15 23:58:53 -07:00
  • 991cd24e73 Change to using modules Byron Lathi 2024-07-15 22:39:27 -07:00
  • f5779922ef Remove old SD controller Byron Lathi 2024-07-14 22:16:35 -07:00
  • 2f6c1bff83 Merge branch '82-add-axi-sd-card-controller' into 'AXI-Rewrite' Byron Lathi 2024-03-18 06:19:37 +00:00
  • 25f51deaa7 Synthesize sd card dma Byron Lathi 2024-03-17 22:26:42 -07:00
  • 9b50dab855 Update submodules, update sources Byron Lathi 2024-03-15 21:02:53 -07:00
  • eb5c3b0b02 Update verilog sd to get up to cmd7 Byron Lathi 2024-03-14 19:34:04 -07:00
  • 0f9e470d13 Update rtl common since I commited to the wrong branch (again) Byron Lathi 2024-03-14 19:20:08 -07:00
  • 4028c2a36e Update rtl common since I commited to the wrong branch Byron Lathi 2024-03-14 17:14:38 -07:00
  • 335f877d66 Run simulation with verilog sd emulator Byron Lathi 2024-03-14 08:17:05 -07:00
  • 24a7001aee Add sd mode sd card emulator Byron Lathi 2024-03-13 00:01:39 -07:00
  • 262c4cfd83 Add sd emulator (need to add sd mode) Byron Lathi 2024-03-12 22:14:02 -07:00
  • 14cf303c9f Update sd controller for sim Byron Lathi 2024-03-12 21:51:55 -07:00
  • 02097ff3b8 Update sd controller with data host Byron Lathi 2024-03-12 20:23:41 -07:00
  • 455814ec14 Update sd controller and test code Byron Lathi 2024-03-12 18:20:51 -07:00
  • f7580f719f Add program target to makefiles Byron Lathi 2024-03-10 22:25:29 -07:00
  • 61f6e53327 Updates based on fpga test Byron Lathi 2024-03-10 21:57:22 -07:00
  • 3c0bf9740c Delete init hex on clean Byron Lathi 2024-03-10 21:56:48 -07:00
  • 142759ff59 Require python3.11 Byron Lathi 2024-03-10 16:42:21 -07:00
  • d3914b3a51 Add sd io pins Byron Lathi 2024-03-10 16:09:12 -07:00
  • 8f6d074255 Re-order init script to fix python import issue in synthesis Byron Lathi 2024-03-10 12:55:38 -07:00
  • cb426670cd Do synthesis with sd controller Byron Lathi 2024-03-10 12:29:08 -07:00
  • da41e60ee7 integrate sd controller and super simple tb Byron Lathi 2024-03-10 11:31:07 -07:00
  • 81382925f8 Update rtl common and sd controller submodules Byron Lathi 2024-03-10 10:24:50 -07:00
  • 96e014567d Add sd controller submodule Byron Lathi 2024-03-04 00:05:18 -08:00
  • cf693a28d6 Merge branch '79-add-sdram' into 'AXI-Rewrite' Byron Lathi 2024-03-04 07:38:13 +00:00
  • 38c64e5551 Add sdram io to fpga Byron Lathi 2024-03-03 23:30:27 -08:00
  • 358dfdbe75 Add sdram io to fpga Byron Lathi 2024-03-03 23:30:27 -08:00
  • aee04b777a Fix sdram sim Byron Lathi 2024-03-03 21:33:28 -08:00
  • 10a72d8e1f Add sdram, don't think it works though Byron Lathi 2024-03-03 20:43:37 -08:00
  • 78dfb01bd7 Merge branch '81-add-simulation' into 'AXI-Rewrite' Byron Lathi 2024-03-04 01:24:49 +00:00
  • 12f54e7358 Merge branch '78-add-basic-software' into 81-add-simulation Byron Lathi 2024-03-03 17:17:13 -08:00
  • 01b1ecbcac Add basic sim Byron Lathi 2024-03-03 17:06:10 -08:00
  • 3a9b967a5d Merge branch '78-add-basic-software' into 'AXI-Rewrite' Byron Lathi 2024-03-03 23:17:39 +00:00
  • ab9da189d1 Build software correctly, ignore debugger files Byron Lathi 2024-03-03 14:45:48 -08:00
  • a343b23ddd Make a venv in build Byron Lathi 2024-03-03 13:10:35 -08:00
  • d60d7a25b2 Build everything in ci Byron Lathi 2024-03-03 13:06:56 -08:00
  • 42fbc17a2a Add test code and top level Makefile Byron Lathi 2024-03-03 12:52:44 -08:00
  • 0ba5888aa1 Merge branch '77-add-axi-cpu-and-ram' into 'AXI-Rewrite' Byron Lathi 2024-03-03 19:38:10 +00:00
  • cd1dfa39cb Fix PLL settings, add cpu output clock Byron Lathi 2024-03-03 09:45:04 -08:00
  • 6213d2a227 Use relative submodule paths for ci Byron Lathi 2024-03-02 23:47:13 -08:00
  • 31b3fdcfc9 Add basic ci and separate hw from all target Byron Lathi 2024-03-02 22:55:39 -08:00
  • 0752220b0e Add basic project with cpu, ram and rom Byron Lathi 2024-03-02 22:46:48 -08:00
  • 0a0394ae33 Delete everything Byron Lathi 2024-03-02 20:10:50 -08:00
  • 273484b994 Merge branch '15-parse-the-read-only-file-system' into 'master' Byron Lathi 2023-12-09 07:28:55 +00:00
  • 0aca4af272 Add fixes for multiple sectors per cluster Byron Lathi 2023-12-08 23:11:52 -08:00
  • 5259fa8e65 Clear the carry flag, not the interrupt flag... Byron Lathi 2023-12-08 08:12:50 -08:00
  • 15e9b44318 Try clearing carry flag, that always helps. Also don't need verilog image anymore Byron Lathi 2023-12-07 23:29:18 -08:00
  • 6f16ac4daf Add close, add filesystem code to main kernel for hardware testing Byron Lathi 2023-12-07 08:10:45 -08:00
  • 0327ab6a2b Handle non-aligned reads Byron Lathi 2023-12-06 21:02:41 -08:00
  • 066bb0ee8c Get read working a little bit more. Need to handle edge cases! Byron Lathi 2023-12-05 23:29:00 -08:00
  • 4c3c3fd731 Get something working with read Byron Lathi 2023-12-05 22:47:24 -08:00
  • 48b39eb92d Hack together open() Byron Lathi 2023-12-05 18:04:08 -08:00
  • 9ae1593957 Read out very long file, but not very long name Byron Lathi 2023-12-05 08:29:44 -08:00
  • 13738fc0d8 Read a little bit of the data from the file Byron Lathi 2023-12-05 08:15:24 -08:00
  • 946234381d Look through files without trying too hard Byron Lathi 2023-12-05 08:08:20 -08:00
  • 2859055f98 Add some basic code, build kernel stuff in tree Byron Lathi 2023-12-04 23:06:00 -08:00
  • 902b1b5bb9 Save root cluster number Byron Lathi 2023-12-04 21:57:36 -08:00
  • 84814f05f9 Calculate data start Byron Lathi 2023-12-04 18:40:21 -08:00
  • 16a7f4db4d Update cc65 pointer with PVSeek Byron Lathi 2023-12-04 00:13:16 -08:00
  • 5c74d161d4 Add some basic fat32 code Byron Lathi 2023-12-03 23:27:45 -08:00
  • 184c58b962 Add dumb multiplier code test Byron Lathi 2023-12-02 20:31:59 -08:00
  • 2f8290bfb0 Merge branch '16-realtime-clock-driver' into 'master' Byron Lathi 2023-12-02 07:15:50 +00:00
  • de804ac3ca Use tmp1 instead of y register Byron Lathi 2023-12-01 22:53:41 -08:00
  • e8452eb98c Add rtc_set Byron Lathi 2023-12-01 08:28:38 -08:00
  • 2cdd260a87 Change kicad library commit Byron Lathi 2023-12-01 07:57:38 -08:00
  • d49fa64d34 Merge branch '14-terminal-driver' into 'master' Byron Lathi 2023-12-01 09:13:39 +00:00
  • eb676da0d7 Merge branch '68-fpga-images-randomly-do-not-work' into 'master' Byron Lathi 2023-12-01 08:57:53 +00:00
  • 32c82044a7 Fix more bugs Byron Lathi 2023-12-01 00:56:16 -08:00
  • a169b30028 Fix not saving to ptr1 and comparing y Byron Lathi 2023-11-30 23:57:58 -08:00
  • e805b19eca Add some flops to the mapper Byron Lathi 2023-11-30 17:40:21 -08:00
  • 597d15e234 Add terminal write as well, use it in kernel Byron Lathi 2023-11-29 17:19:18 -08:00
  • b25d0e9bdb First shot at terminal read Byron Lathi 2023-11-29 08:38:25 -08:00
  • 5b6a4e1442 Start terminal driver Byron Lathi 2023-11-28 23:52:27 -08:00
  • e73d8db74c Serial Fix Byron Lathi 2023-11-28 23:23:31 -08:00
  • fd9ccdbce4 Add serial driver and irq support Byron Lathi 2023-11-28 22:54:26 -08:00
  • 3524892f80 Add quick uart irq test Byron Lathi 2023-11-28 17:45:20 -08:00
  • db4848b6fe Merge branch '62-create-basic-board' into 'master' Byron Lathi 2023-11-27 03:12:02 +00:00
  • 0a854fcb7b Add wires to fpga block (but don't connect them) Byron Lathi 2023-11-26 18:55:02 -08:00
  • 59017d637e Create schematic heirarchy Byron Lathi 2023-11-26 17:34:15 -08:00
  • b9595a7450 Create project, set env vars Byron Lathi 2023-11-26 17:08:30 -08:00
  • 0efaad22c7 Merge branch '61-create-symbols-for-board' into 'master' Byron Lathi 2023-11-26 22:55:02 +00:00
  • 1d61d183b0 Add updated kicad library Byron Lathi 2023-11-26 14:37:43 -08:00
  • b114103478 Merge branch '60-custom-board-parts-list' into 'master' Byron Lathi 2023-11-26 09:11:53 +00:00
  • b71e29e0d4 Don't clone kicad library for ci Byron Lathi 2023-11-25 21:35:43 -08:00
  • ed3edb5fab Change kicad library to be a submodule Byron Lathi 2023-11-25 21:19:34 -08:00
  • fe960bf0e3 Add docs Byron Lathi 2023-11-25 20:38:38 -08:00
  • be31de4470 Add parts list Byron Lathi 2023-11-25 20:22:39 -08:00
  • 9f897c22f4 Merge branch '59-fix-cpu-speed' into 'master' Byron Lathi 2023-11-25 07:10:45 +00:00
  • 38af9b2545 Reduce cpu speed Byron Lathi 2023-11-24 22:43:47 -08:00
  • 89a1a70917 Revert sdram state machine upgrade Byron Lathi 2023-11-24 17:54:03 -08:00
  • 8c6b262f0c Merge branch '55-increase-sd-card-speed' into 'master' Byron Lathi 2023-11-23 20:23:57 +00:00
  • 8721c816fc Move fast signals to fast reset Byron Lathi 2023-11-23 12:06:19 -08:00