Alex Forencich
|
28195390a2
|
eth: Add GBX_CNT to taxi_xgmii_baser_enc_64 testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-13 16:35:04 -07:00 |
|
Alex Forencich
|
d4acf48e0a
|
eth: Fix gearbox interface in 10G PHY
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-13 16:34:44 -07:00 |
|
Alex Forencich
|
0fd4000f69
|
eth: Support both split and combined MAC/PCS in UltraScale wrapper
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-13 14:31:14 -07:00 |
|
Alex Forencich
|
886aa65522
|
eth: Add testbench for taxi_eth_mac_25g_us module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-13 10:34:43 -07:00 |
|
Alex Forencich
|
98d06954cc
|
eth: Avoid hardcoding clock period
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-13 10:28:53 -07:00 |
|
Alex Forencich
|
4e66dd0f98
|
eth: Rename gearbox start signals to sync
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-12 15:45:07 -07:00 |
|
Alex Forencich
|
ca3ee2d197
|
eth: Fix PFC/LFC parameters in 25G MAC modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-12 14:56:55 -07:00 |
|
Alex Forencich
|
a146aeaf21
|
lfsr: Merge output state with data when possible
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 18:48:07 -07:00 |
|
Alex Forencich
|
faa914c828
|
lfsr: Merge input state with data when possible
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 18:30:31 -07:00 |
|
Alex Forencich
|
a4ac9e7bb0
|
lfsr: Add PCIe scramlber sequence as a galois-mode PRBS test
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 13:06:51 -07:00 |
|
Alex Forencich
|
79a1438230
|
lfsr: Remove debug prints
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 13:03:10 -07:00 |
|
Alex Forencich
|
f7315b7675
|
lfsr: Clean up LFSR implementation
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 00:35:36 -07:00 |
|
Alex Forencich
|
4e7e39828b
|
lfsr: Add tests for PCIe gen 3 scrambler
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 23:56:55 -07:00 |
|
Alex Forencich
|
e36ac879f7
|
lfsr: Add support for non-self-synchronizing scrambler, add tests for PCIe gen 1/2 scrambler
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 23:20:42 -07:00 |
|
Alex Forencich
|
90780aa0b5
|
lfsr: Fix alignment
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 22:41:31 -07:00 |
|
Alex Forencich
|
a1e24f2d7f
|
lfsr: Add input and output enable parameters to LFSR module to remove dead code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 19:08:55 -07:00 |
|
Alex Forencich
|
16395bd5cd
|
lss: Fix I2C waveforms
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 16:45:27 -07:00 |
|
Alex Forencich
|
3ec52611eb
|
ptp: Adjust testbench thresholds
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-30 22:11:36 -07:00 |
|
Alex Forencich
|
0eec8eb5be
|
ci: Update verilator to 5.034
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-30 21:47:36 -07:00 |
|
Alex Forencich
|
e4762b7a8c
|
eth: Add support for synchronous gearbox to PHY, MAC+PHY, and GT wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-30 21:14:54 -07:00 |
|
Alex Forencich
|
f31ba113d2
|
example: Fix KCU105 TX disable pin constraints
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-30 18:54:45 -07:00 |
|
Alex Forencich
|
aa8f19bf3b
|
eth: Reorganize clock enable in BASE-R model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-27 23:56:28 -07:00 |
|
Alex Forencich
|
9bce7f4165
|
eth: Shorten header argument name in BASE-R model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-27 21:27:46 -07:00 |
|
Alex Forencich
|
8a77ee9fc7
|
eth: Add reset logic, QPLL control signals, and additional configuration parameters for US/US+ GTH/GTY transceivers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-21 21:06:45 -07:00 |
|
Alex Forencich
|
66b53d98a2
|
Reorganize repository
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-18 12:25:59 -07:00 |
|
Alex Forencich
|
8cdae180a1
|
example/Alveo: fix XFCP UART connection
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-07 15:19:57 -07:00 |
|
Alex Forencich
|
add5662098
|
eth: Add RX MAC control frame count to MAC statistics counters
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-07 14:48:33 -07:00 |
|
Alex Forencich
|
7bfc62d0d2
|
example: Add example design for BittWare XUP-P3R/XUSP3S
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-02 00:08:20 -07:00 |
|
Alex Forencich
|
e49adb2488
|
pcie: Add PCIe AXI lite master module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-29 22:27:32 -07:00 |
|
Alex Forencich
|
df87e87e2d
|
pcie: Add PCIe AXI lite master (minimal) module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-29 22:26:19 -07:00 |
|
Alex Forencich
|
093373a2b3
|
pcie: Add generic PCIe interface model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-29 22:25:33 -07:00 |
|
Alex Forencich
|
98aeac03b1
|
pcie: Add PCIe TLP interface
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-29 20:56:23 -07:00 |
|
Alex Forencich
|
3401e069d1
|
sync: Set ASYNC_REG in HDL instead of TCL
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-28 20:03:38 -07:00 |
|
Alex Forencich
|
577c572c5d
|
example: Update example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-28 17:12:55 -07:00 |
|
Alex Forencich
|
d43569a92a
|
eth: Add taxi_eth_phy_25g_us_gt module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-28 17:12:05 -07:00 |
|
Alex Forencich
|
8dc33f3a44
|
eth: Use shared counter for fractional part of pause quanta
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-26 20:02:35 -07:00 |
|
Alex Forencich
|
3dc7e4821d
|
eth: Ensure header pointer is wide enough to clear the entire header before halting
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-26 19:31:51 -07:00 |
|
Alex Forencich
|
be7016991a
|
eth: Fix OS_START block decode issue in xgmii_baser_dec_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-26 19:27:32 -07:00 |
|
Alex Forencich
|
6584ebb6cd
|
example: Enable statistics strings in example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-17 00:34:53 -07:00 |
|
Alex Forencich
|
0044782224
|
eth: Remove FIFO pipeline registers for statistics FIFOs in distributed RAM
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-17 00:34:22 -07:00 |
|
Alex Forencich
|
800c6a9a0b
|
eth: Clean up statistics infrastructure
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-16 22:44:32 -07:00 |
|
Alex Forencich
|
8d7ec01268
|
xfcp: Collect statistics strings
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-16 22:42:58 -07:00 |
|
Alex Forencich
|
a1832339d2
|
stats: Exclude strings from statistics counts
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-16 22:41:57 -07:00 |
|
Alex Forencich
|
01c0c6cdc6
|
stats: Add strings collector
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-16 22:40:53 -07:00 |
|
Alex Forencich
|
e6cf1f5850
|
eth: Add statistics strings to Ethernet MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-16 21:35:50 -07:00 |
|
Alex Forencich
|
031d092513
|
stats: Add string support to statistics collector
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-16 17:08:52 -07:00 |
|
Alex Forencich
|
e3fcf54466
|
stats: Add gate input to statistics collector
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-16 11:54:16 -07:00 |
|
Alex Forencich
|
4be054e9b3
|
eth: Reorganize MAC stats module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-15 10:59:35 -07:00 |
|
Alex Forencich
|
99933f3234
|
stats: Optimize zeroing and output logic
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-14 22:20:39 -07:00 |
|
Alex Forencich
|
b505167348
|
stats: Add defaults for inputs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-14 16:44:03 -07:00 |
|