By doing this we don't need to call bios functions, we can just jsr
directly to the addresses. This does mean that everytime the bios
changes the bootloader has to change, but ideally all the bootloader
does is load the bios and then get remapped out of memory. Any important
drivers like file system can be loaded from the bootloader.
This also means that the runtime functions are located in the bios for
the bootloader, so the rom will have to stay mapped in until the kernel
is started, at which point it will have its own runtime and the rom and
bootloader are no longer needed.
For some reason the old one did not want to open in the new version.
Even though the version of the IP is the same, something about it being
made with the old Efinity version made it mad.
I just deleted it and made it again with the same settings and now it
lets me open and configure it.
The pipelining allows the cpu to run at a faster clock speed but results
in latency. At the current 2 MHz, there is 1 cycle of latency which is
negligible because the 6502 cannot do sequential data memory accesses.
In the future, there will have to be some sort of status flag or
interrupt showing that the divider is ready.
Adds a 16x16 divider to go with the multiplier.
The divider is a single stage with no pipelining, which works at the
slow 2MHz frequency. Doing this lowers the maximum clock frequency to 5.
This is acceptable for now but means that the cpu can't be run at 14,
which is the maximum frequency.
This will have to be changed, some things like the VGA connector will
not work because they will interfere with the cpu adapter.
It may be worth thinking about making these smaller and not including
the ethernet for example, since that will not come for a while.
The only things we really need to start are the SD card and serial port.
