Alex Forencich
|
7128b90c1d
|
stats: Simplify zeroing in statistics collector
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-04-10 00:20:52 -07:00 |
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Alex Forencich
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93d9c8c9f6
|
eth: Add MAC statistics module to 10G MAC+PCS
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-04-09 12:18:42 -07:00 |
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Alex Forencich
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abadd72b1d
|
stats: Fix naming in statistics counter module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 10:05:41 -07:00 |
|
Alex Forencich
|
2714583a57
|
xfcp: Add XFCP statistics counter module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 00:22:18 -07:00 |
|
Alex Forencich
|
06e9588609
|
axis: Fix parameter accesses in interface arrays
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 00:08:16 -07:00 |
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Alex Forencich
|
e90340db6e
|
eth: Add MAC statistics module to 1G MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-08 20:22:53 -07:00 |
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Alex Forencich
|
bb90cd5a08
|
eth: Add MAC statistics module to 10G MAC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-08 20:18:43 -07:00 |
|
Alex Forencich
|
3106fd5a96
|
eth: Add MAC statistics module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-08 10:49:45 -07:00 |
|
Alex Forencich
|
f920e56348
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_baser_rx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:37:29 -07:00 |
|
Alex Forencich
|
c69eb63a69
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_rx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:29:50 -07:00 |
|
Alex Forencich
|
a53d18b9d3
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_rx_32
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:28:59 -07:00 |
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Alex Forencich
|
cb148ee905
|
eth: Report PHY-signalled errors as framing errors instead of bad blocks
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:02:23 -07:00 |
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Alex Forencich
|
f8890e4d80
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_baser_tx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 22:03:26 -07:00 |
|
Alex Forencich
|
4fd3028f77
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_tx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 22:01:57 -07:00 |
|
Alex Forencich
|
6d31116596
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_tx_32
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 22:00:34 -07:00 |
|
Alex Forencich
|
2e05b1eff2
|
eth: Fix RX byte statistics strobe on AXIS GMII RX module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:31:50 -07:00 |
|
Alex Forencich
|
bc023296f4
|
eth: Do not count SFD as payload data
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:25:39 -07:00 |
|
Alex Forencich
|
0ef0bb3409
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_gmii_rx
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-06 00:17:31 -07:00 |
|
Alex Forencich
|
5582eddfa8
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_gmii_tx
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-05 22:15:39 -07:00 |
|
Alex Forencich
|
df87998a1b
|
eth: Clean up error detection logic in combined MAC/PCS
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-27 09:33:56 -07:00 |
|
Alex Forencich
|
bec324dc03
|
eth: Fix bugs in 10G MAC RX related to short IFGs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 23:03:57 -07:00 |
|
Alex Forencich
|
75a3909c37
|
eth: Add default IFG setting to Ethernet MAC TX modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 20:13:47 -07:00 |
|
Alex Forencich
|
d2b0fa4693
|
stats: Add statistics counter module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-25 00:02:58 -07:00 |
|
Alex Forencich
|
fd3e23ef6e
|
stats: Add statistics collector module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-24 23:22:04 -07:00 |
|
Alex Forencich
|
315a4715ff
|
xfcp: Fix localparam definition
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 16:32:17 -07:00 |
|
Alex Forencich
|
2fd346269f
|
xfcp: Add XFCP I2C master module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 15:56:39 -07:00 |
|
Alex Forencich
|
79e0bf6976
|
lss: Remove redundant tristate control outputs on I2C modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 12:41:39 -07:00 |
|
Alex Forencich
|
fa2385aedb
|
lss: Add I2C single register module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 12:15:47 -07:00 |
|
Alex Forencich
|
44c811f82a
|
lss: Add I2C master module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-19 10:41:16 -07:00 |
|
Alex Forencich
|
3624976f0e
|
hip: Add support for optional phase shifter clock to fractional MMCM module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-17 21:05:49 -07:00 |
|
Alex Forencich
|
d7e29a2b5c
|
hip: Add support for optional cascaded MMCM for offset clock
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-17 21:04:52 -07:00 |
|
Alex Forencich
|
b468d92e39
|
hip: Report error if fractional MMCM configuration does not work
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-17 21:00:12 -07:00 |
|
Alex Forencich
|
eacae099bf
|
hip: Add fractional MMCM wrapper for generating offset clocks for DDMTD
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-13 21:00:09 -07:00 |
|
Alex Forencich
|
ebeadee172
|
lss: Implement fractional baud rate generation for UART
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-11 23:49:39 -07:00 |
|
Alex Forencich
|
1c686391ab
|
lss: Refactor UART module to split out and share baud rate generation logic
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-11 23:09:19 -07:00 |
|
Alex Forencich
|
7df14e54e5
|
xfcp: Rename signals based on upstream/downstsream port role and data direction to simplify connections
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-11 18:33:57 -07:00 |
|
Alex Forencich
|
15653923fd
|
xfcp: Add XFCP switch module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-10 15:30:59 -07:00 |
|
Alex Forencich
|
0ee729b744
|
xfcp: Add XFCP AXI module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-10 13:28:05 -07:00 |
|
Alex Forencich
|
70d77c8a95
|
xfcp: Add XFCP AXI lite module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-10 13:25:55 -07:00 |
|
Alex Forencich
|
ed9e8ffab3
|
eth: Use unpacked arrays for multidimensional ports
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-07 11:05:58 -08:00 |
|
Alex Forencich
|
024353c68a
|
lss: Add MDIO master
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 23:48:57 -08:00 |
|
Alex Forencich
|
ed325acb1e
|
axis: Implement tstrb in pipeline FIFO
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:18:20 -08:00 |
|
Alex Forencich
|
e9ac4947ba
|
axis: Normalize unpacked dimension
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:17:05 -08:00 |
|
Alex Forencich
|
56215865da
|
axi: Normalize unpacked dimension
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:16:29 -08:00 |
|
Alex Forencich
|
c422297666
|
axis: Tie off unused sideband signals in COBS encoder
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-06 16:11:38 -08:00 |
|
Alex Forencich
|
194a686bda
|
xfcp: Add XFCP UART interface module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-04 22:05:11 -08:00 |
|
Alex Forencich
|
98ea651532
|
axis: Use unpacked arrays for unpacking interface signals
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-02-28 23:24:56 -08:00 |
|
Alex Forencich
|
56a3c9f1ba
|
axis: Add AXI stream arbitrated multiplexer module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-02-28 23:24:40 -08:00 |
|
Alex Forencich
|
46e60d32f2
|
prim: Add arbiter module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-02-28 21:04:49 -08:00 |
|
Alex Forencich
|
5966d05740
|
prim: Add priority encoder and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-02-28 21:04:32 -08:00 |
|