Alex Forencich
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933899887a
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axis: Add AXI stream switch module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-07-31 11:47:49 -07:00 |
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Alex Forencich
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bd0b0cd75a
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Update documentation URL
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-07-30 19:12:45 -07:00 |
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Alex Forencich
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d10e3cf5c0
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axis: Add AXI stream demultiplexer module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-07-30 19:10:48 -07:00 |
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Alex Forencich
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b266aa2949
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axis: Add AXI stream concatenator module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-07-30 18:57:11 -07:00 |
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Alex Forencich
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7bfc62d0d2
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example: Add example design for BittWare XUP-P3R/XUSP3S
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-02 00:08:20 -07:00 |
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Alex Forencich
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b0bdf8ee17
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-26 00:13:12 -07:00 |
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Alex Forencich
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8ecb68ae01
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-25 00:04:54 -07:00 |
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Alex Forencich
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2fd346269f
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xfcp: Add XFCP I2C master module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-19 15:56:39 -07:00 |
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Alex Forencich
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fa2385aedb
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lss: Add I2C single register module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-19 12:15:47 -07:00 |
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Alex Forencich
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44c811f82a
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lss: Add I2C master module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-19 10:41:16 -07:00 |
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Alex Forencich
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8d4ad59727
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-10 17:04:03 -07:00 |
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Alex Forencich
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cb04b84e18
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example/VCU118: Add example design for VCU118
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-07 00:29:17 -08:00 |
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Alex Forencich
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024353c68a
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lss: Add MDIO master
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-03-06 23:48:57 -08:00 |
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Alex Forencich
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df300b7dad
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axis: Add AXI stream multiplexer module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 13:28:02 -08:00 |
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Alex Forencich
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ff2e3c1331
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 00:59:30 -08:00 |
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Alex Forencich
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ad3042e090
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axi: Add AXI lite dual-port RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 00:58:30 -08:00 |
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Alex Forencich
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55c097f47d
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axi: Add AXI RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 00:27:11 -08:00 |
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Alex Forencich
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0632b1982e
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axi: Add AXI lite RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-27 00:26:03 -08:00 |
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Alex Forencich
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c478f187b1
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-26 21:09:29 -08:00 |
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Alex Forencich
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8785c1517b
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example/fb2CG: Add example design for fb2CG@KU15P
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-25 15:49:21 -08:00 |
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Alex Forencich
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b18b643eed
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example/Alveo: Add example design for Xilinx Alveo series
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-25 11:34:26 -08:00 |
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Alex Forencich
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ffe667b047
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example/Nexus_K3P_Q: Add example design for Cisco Nexus K3P-Q
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-24 21:39:26 -08:00 |
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Alex Forencich
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8ffbd43e08
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example/Nexus_K3P_S: Add example design for Cisco Nexus K35-S/K3P-S
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-24 21:04:42 -08:00 |
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Alex Forencich
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34266fe25d
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example/ZCU111: Add example design for ZCU111
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-23 17:32:21 -08:00 |
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Alex Forencich
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2fa899373e
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-23 14:13:42 -08:00 |
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Alex Forencich
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951f81680a
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example/ADM_PCIE_9V3: Add example design for ADM-PCIE-9V3
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-23 00:49:41 -08:00 |
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Alex Forencich
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75a746333e
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-22 23:36:13 -08:00 |
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Alex Forencich
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650da9c972
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example/HTG940: Add example design for HTG940
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-20 10:20:15 -08:00 |
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Alex Forencich
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d5ed74431a
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example/KR260: Add example design for KR260
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-19 10:59:15 -08:00 |
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Alex Forencich
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2e35f5b5ff
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example/KCU105: Add example design for KCU105
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-18 18:08:25 -08:00 |
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Alex Forencich
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c7b79f9afb
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example/VCU108: Add example design for VCU108
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-18 15:14:36 -08:00 |
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Alex Forencich
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53688afeb5
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example/KC705: Add example design for Xilinx KC705
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-18 09:45:36 -08:00 |
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Alex Forencich
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2c6fac0b9d
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-17 00:13:51 -08:00 |
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Alex Forencich
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1112545d0a
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-16 22:22:43 -08:00 |
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Alex Forencich
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d048a8d7c7
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-13 22:23:57 -08:00 |
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Alex Forencich
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9ad43f3433
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-13 22:13:01 -08:00 |
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Alex Forencich
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d1578513c8
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-13 13:51:25 -08:00 |
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Alex Forencich
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8aa4c066b2
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Update readme
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-03 14:22:31 -08:00 |
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Alex Forencich
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5f87c2e84e
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Initial commit
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-02 22:45:06 -08:00 |
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